4 ms·
Wow ! 56 (!) times more core than the biggest Nvidia Volta core, a single 46 square millimeters chip (no chiplets like recent AMD chips), and an incredible woop
by navaati 7y ago
Wow ! 56 (!) times more core than the biggest Nvidia Volta core, a single 46 square millimeters chip (no chiplets like recent AMD chips), and an incredible wooping 18 GB of SRAM (that’s like 18GB of CPU cache basically) !
I don’t know if you guys are used to that scale but I find it monstruous !
- 14 7y agoI was a little confused when I read your comment and 46 square millimeters. I am guessing you meant 46k square millimeters as the article stated 46,225 square millimeters which yes you are right that is monstrous. Very cool! As a care giver I often discuss with my clients the cool things that have come into existence in their life time and wonder when I get old what things will my children reflect back on and say grandpa you were alive when “x” was invented how neat. Personally I am hoping it is fusion power.
- thfuran 7y agoI'll put my vote in for commodity room-temperature superconductors.
- duderific 7y agoThe young people I work with are always shocked when I tell them there was no internet (or at least, nothing terribly useful at the consumer level) when I went to college.
- navaati 7y agoAh, stupid me :). I had no idea of the scale of things and in my native locale the comma is the decimal point...
- fartismartass 7y agoIt is monstrous. But the way I read it, it is actually similar to chiplets. Only chiplets are cut from the wafer, individually tested and then combined for the final chip. Here all parts stay on the wafer and faulty ones are routed around.
- rbanffy 7y agoSince they are wiring the chips on the wafer and routing around defects, I imagine a chiplet design on a wafer-sized interposer would help them deal with yield issues. I wonder what their competition will do. It's certainly possible for Nvidia or AMD to bundle GPU dies on top of large interposers and TSMC has already shown large ones, though nothing on this scale.
- Tuna-Fish 7y agoIt's wafer scale integration. All the major AI learning chips are probably heading this way. That is, CPUs and GPUs are made on silicon wafers, typically 30cm in diameter, with many chips built on a single wafer and then cut from the wafer and packaged into products. The idea of wafer-scale integration is that instead of cutting the wafer, you just build all the communication between the computation elements in the wafer into the wafer and therefore get a "network on wafer", a single very massive "chip". The reason to do this is that the lowest-energy way to communicate data is on-chip, and in major AI learning setups, by far the most of the power is spent on data movement. By making the largest possible chip, you minimize the data movement power requirements and spare more power for the computation.
- sanxiyn 7y agoWafer scale integration does seem to be a logical conclusion of integrated circuit. When Jack Kilby invented IC it indeed was a stroke of genius.