4 ms·

It's not just that it's slow, it also uses a lot of energy compared to the amount of calculation that it does. Apple II: 0.43 Mips @ 17W RPi3B: 1822 Mips @ 1.

It's not just that it's slow, it also uses a lot of energy compared to the amount of calculation that it does. Apple II: 0.43 Mips @ 17W RPi3B: 1822 Mips @ 1.2W So I wonder if there is a solution as energy efficient as modern hardware, but as slow as 8 bit machines.

segfaultbuserr 7y ago
Ultra-low-power 8-bit microcontrollers? 1 MIPS @ 1 W is possible on a AVR I believe, but still much less efficient than a modern CPU. Economic-of-scale at work, you can't compete with greater integration.
sehugg 7y ago
Ultra-low-power MCUs are ~80 μA/MHz, so yes, you can get there. Bitcoin doesn't require a lot of RAM, which helps power consumption significantly.
- Veedrac 7y ago
  Worth noting that even the lowest power microcontroller will presumably run circles around an old 8-bit architecture.
Rebelgecko 7y ago
FPGA with limited clock speed?
- unimployed 7y ago
  Not sure an FPGA will output enough work to be economical. Probably still stuck with ASIC.
- arcticbull 7y ago
  FPGAs aren't particularly energy efficient compared to ASIC implementations of the same hardware.
  - bredren 7y ago
    This is the point of FPGA in consumer products right? Ship the DVD player ASAP see if it sells then spin silicon.
    - arcticbull 7y ago
      Generally you don't ship FPGAs in consumer devices you plan to sell in high quantities, as they're very expensive in addition to not being very efficient. Small FPGAs or CPLDs can be used for low-volume devices to avoid the huge non-recoupable expenses of an ASIC spin -- because of the specific requirements of the application. They're almost exclusively used for prototyping ASICs.
deleted 7y ago
[deleted]
rarecoil 7y ago
This calculation makes me curious, as I know very little about computer engineering/hardware but want to learn: what is the current-most energy-efficient general CPU architecture/core in performance-per-watt? Some high-speed ARM? A Y-series x86?
- blueboo 7y ago
  This may not have the latest record, but lots of interesting and relevant info here: https://en.m.wikipedia.org/wiki/Performance_per_watt https://en.m.wikipedia.org/wiki/Performance_per_watt https://streamhpc.com/blog/2012-08-27/processors-that-can-do-20-gflops-watt/ https://streamhpc.com/blog/2012-08-27/processors-that-can-do... is interesting too, though obviously out of date, but might reflect how GPUs are efficient as are the latest CPUs with their smaller lithography.
wiz21c 7y ago
>> Apple II: 0.43 Mips This number seems quite optimistic to me (I've found it on wikipedia). It just happens I was coding for fun in assembly language on Apple II some weeks ago and the minimum opcode length is two cpu cycles, so I'd say at best we're at 0.5 mips (the apple is 1 Mhz). And for anything useful it'd be closer to 0.25 mips). https://en.wikipedia.org/wiki/Instructions_per_second#cite_note-en.community.dell.com-1 https://en.wikipedia.org/wiki/Instructions_per_second#cite_n... http://www.6502.org/tutorials/6502opcodes.html http://www.6502.org/tutorials/6502opcodes.html

segfaultbuserr 7y ago

Ultra-low-power 8-bit microcontrollers? 1 MIPS @ 1 W is possible on a AVR I believe, but still much less efficient than a modern CPU. Economic-of-scale at work, you can't compete with greater integration.

sehugg 7y ago

Ultra-low-power MCUs are ~80 μA/MHz, so yes, you can get there. Bitcoin doesn't require a lot of RAM, which helps power consumption significantly.

Veedrac 7y ago
Worth noting that even the lowest power microcontroller will presumably run circles around an old 8-bit architecture.

Rebelgecko 7y ago

FPGA with limited clock speed?

unimployed 7y ago
Not sure an FPGA will output enough work to be economical. Probably still stuck with ASIC.
arcticbull 7y ago
FPGAs aren't particularly energy efficient compared to ASIC implementations of the same hardware.
- bredren 7y ago
  This is the point of FPGA in consumer products right? Ship the DVD player ASAP see if it sells then spin silicon.
  - arcticbull 7y ago
    Generally you don't ship FPGAs in consumer devices you plan to sell in high quantities, as they're very expensive in addition to not being very efficient. Small FPGAs or CPLDs can be used for low-volume devices to avoid the huge non-recoupable expenses of an ASIC spin -- because of the specific requirements of the application. They're almost exclusively used for prototyping ASICs.

deleted 7y ago

[deleted]

rarecoil 7y ago

This calculation makes me curious, as I know very little about computer engineering/hardware but want to learn: what is the current-most energy-efficient general CPU architecture/core in performance-per-watt? Some high-speed ARM? A Y-series x86?

blueboo 7y ago
This may not have the latest record, but lots of interesting and relevant info here: https://en.m.wikipedia.org/wiki/Performance_per_watt https://en.m.wikipedia.org/wiki/Performance_per_watt https://streamhpc.com/blog/2012-08-27/processors-that-can-do-20-gflops-watt/ https://streamhpc.com/blog/2012-08-27/processors-that-can-do... is interesting too, though obviously out of date, but might reflect how GPUs are efficient as are the latest CPUs with their smaller lithography.

wiz21c 7y ago

>> Apple II: 0.43 Mips This number seems quite optimistic to me (I've found it on wikipedia). It just happens I was coding for fun in assembly language on Apple II some weeks ago and the minimum opcode length is two cpu cycles, so I'd say at best we're at 0.5 mips (the apple is 1 Mhz). And for anything useful it'd be closer to 0.25 mips). https://en.wikipedia.org/wiki/Instructions_per_second#cite_note-en.community.dell.com-1 https://en.wikipedia.org/wiki/Instructions_per_second#cite_n... http://www.6502.org/tutorials/6502opcodes.html http://www.6502.org/tutorials/6502opcodes.html