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> ...with emulation being faster than the previous architecture (PPC to x86). This is not the history that I remember, at least with contemporary hardware. In

> ...with emulation being faster than the previous architecture (PPC to x86). This is not the history that I remember, at least with contemporary hardware. In my recollection, PPC emulation was generally slower, but it didn't necessarily really matter. > There's no ARM that's fast enough to emulate an x86 in the same power envelope, so right now any transition would either require all performance sensitive apps to be ported or would result in machines that were slower for many tasks. I don't think that's true, at least at the lower end. Whether it is running x86 emulation or native, the Snapdragon 835 comes pretty close to the Celeron N3450, at least in terms of single-core performance. Both chips have a comparable power envelope. https://www.techspot.com/review/1599-windows-on-arm-performance/page2.html https://www.techspot.com/review/1599-windows-on-arm-performa... Emulation adds overhead of course, but it's worth noting that most ISAs are effectively emulated through micro-operations: https://en.wikipedia.org/wiki/Micro-operation https://en.wikipedia.org/wiki/Micro-operation

imtringued 7y ago
>Emulation adds overhead of course, but it's worth noting that most ISAs are effectively emulated through micro-operations That's not even remotely the same thing because that micro-code is optimized to the ISA of the processor and it's obviously specific to the microarchitecture of the processor which is again optimized for a specific ISA. It's like translating a Wikipedia article from normal English to simple English. You didn't cross a complicated language barrier. If I may add my own comment: It's not worth noting at all because your ARM CPU still only implements ARM optimizations and your x86 CPU only implements x86 optimizations. If you had proposed adding hardware acceleration to make emulation of a specific architecture faster then maybe one could have squinted and said it's emulation instead of secretly implementing a x86 CPU in your ARM CPU.
- gridlockd 7y ago
  I don't think it's that different. Microcode can work efficiently with multiple ISAs. In practice, x86 and amd64 are actually fairly different targets. With amd64 you have far more registers and no x87 weirdness, for instance. ARM chips also generally support multiple ISAs. Of course you have trade offs regarding optimizations, but that's true at multiple levels. For example, many exotic x86 instructions (like BCD) aren't as optimized as they could be. > If you had proposed adding hardware acceleration to make emulation of a specific architecture faster then maybe one could have squinted and said it's emulation instead of secretly implementing a x86 CPU in your ARM CPU. Of course I'm talking about hardware-level support. I'm talking about the things that already exist.

imtringued 7y ago

>Emulation adds overhead of course, but it's worth noting that most ISAs are effectively emulated through micro-operations That's not even remotely the same thing because that micro-code is optimized to the ISA of the processor and it's obviously specific to the microarchitecture of the processor which is again optimized for a specific ISA. It's like translating a Wikipedia article from normal English to simple English. You didn't cross a complicated language barrier. If I may add my own comment: It's not worth noting at all because your ARM CPU still only implements ARM optimizations and your x86 CPU only implements x86 optimizations. If you had proposed adding hardware acceleration to make emulation of a specific architecture faster then maybe one could have squinted and said it's emulation instead of secretly implementing a x86 CPU in your ARM CPU.

gridlockd 7y ago
I don't think it's that different. Microcode can work efficiently with multiple ISAs. In practice, x86 and amd64 are actually fairly different targets. With amd64 you have far more registers and no x87 weirdness, for instance. ARM chips also generally support multiple ISAs. Of course you have trade offs regarding optimizations, but that's true at multiple levels. For example, many exotic x86 instructions (like BCD) aren't as optimized as they could be. > If you had proposed adding hardware acceleration to make emulation of a specific architecture faster then maybe one could have squinted and said it's emulation instead of secretly implementing a x86 CPU in your ARM CPU. Of course I'm talking about hardware-level support. I'm talking about the things that already exist.