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AMD EPYC “Rome” Server Processors to Feature 8 to 64 Cores
- abc_lisper 7y agoGiddy! At this rate I will be running a 64 Core processor on my desktop in 2 years!
- Zekio 7y agoWell depending on if the rumors about the 64 core Threadripper are true you could do that later this year or maybe early next year
- MuffinFlavored 7y agoand still have some I/O operation block your entire GUI/OS :D
- mfatica 7y agoelaborate?
- Rebelgecko 7y agoI think they're pointing out that many of the bottlenecks that make computers feel slow can't be fixed by throwing more cores at them—multithreading can be tricky
- astrodust 7y agoYou could have 128 cores, 4TB of memory, multiple top-end NVMe drives and Windows will still lock up when accessing an offline network share. Good job Microsoft.
- vbezhenar 7y agoMore likely sleep with lock.
- mtgx 7y agoThere's already a 64-core Threadripper rumored for the end of this year. Top-tier Ryzen 9 should reach "only" 32 cores on the 5nm process in 2 years.
- bitL 7y ago> "only" 32 cores But it might be 4-way SMP, so 128 threads...
- Ragib_Zaman 7y agoIs this conjecture or has AMD stated in a roadmap they plan to have 5nm in 2 years?
- astrodust 7y agoThey're going to use whatever TSMC uses, and TSMC is committed to 5nm. The process is already being tested. https://www.tomshardware.com/news/tsmc-5nm-euv-process-node,38995.html https://www.tomshardware.com/news/tsmc-5nm-euv-process-node,...
- opencl 7y agoYou can buy a 64 core dual socket EPYC workstation today for ~$15000. I wonder how much cheaper it'll be 2 years from now.
- bhouston 7y ago64 cores but 128 with simultaneous multithreading. And in a 2C configuration, you get 256 threads. That is a beautiful thing.
- agumonkey 7y agoMemories of Niagara falls
- growlist 7y agoI had a quad CPU Dell server. Imagine 512 threads :-0
- mfatica 7y agoLook at me, I'm the GPU now
- tasubotadas 7y agoIt's a good time to be a Python developer :-D
- rubyn00bie 7y agoThe real question for me with all these AMD releases, what's Intel gonna release? It's surprising to me that Apple didn't announce an AMD based Mac Pro-- the chip Intel gave them must really be something. Too bad though because there could be a lot more of them (eventual Mac Pros) out there I'm guessing if they were using these Rome chips.
- dpedu 7y agoIt's probably not just the chip, Intel provides financial incentives for manufacturers who build products around their chips.
- astrodust 7y agoThat usually involves advertising, but Apple has turned down those offers. Not even an "Intel inside" sticker. Apple's relationship with Intel is pretty rocky now. Intel fumbled the i9, their Xeon chips aren't keeping up with AMD's workstation offerings, and their efforts to build a cellular modem chip utterly failed, leaving Apple at the mercy of Qualcomm for that part. I'm sure Apple will cut loose on Intel as soon as they can. They're probably tired of the bullshit.
- rbanffy 7y agoThe financial incentives can cover other chip lines. Apple sells a ton of laptop CPUs and has some preferred partner status with Intel.
- ksec 7y ago>Intel provides financial incentives for manufacturers who build products around their chips. Yes, but I think the bigger picture, Apple needed Intel's iPhone modem for another year. May not be worth to damage the relationship, not to mention the design were likely finalise some time ago. I would not be surprised if the Sale of Modem Business to Apple will include agreement to keep Intel CPU on Mac. ( For the time being ) And I am sure AMD should be aiming EPYC at the Datacenter usage of Apple, which is huge in itself, rather then the market of Mac Pro. Although Apple using AMD on Mac would be a pretty big statement to the rest of the market.
- mastax 7y agoLooks like this is an account that only posts links to this obscure Indian tech blog.
- bitwize 7y agoOh man, I can't wait to make -j 128...
- Royal 7y agoHaving a Rome 64 processor doesn't sound very promising. https://en.wikipedia.org/wiki/Great_Fire_of_Rome https://en.wikipedia.org/wiki/Great_Fire_of_Rome
- nabla9 7y agoDoes anyone have an idea how many different processors tapeouts are needed to create this line? It seems reasonable to assume that 48-core chip is just 64-core chip with few defective cores. A lower clocked version is the same ship that high clocked that did not pass some test.
- bryanlarsen 7y ago2. Epyc is a combination of multiple tiny 7nm 8 core CPU chiplets and a single massive 14nm IO chip.
- frankchn 7y agoTwo tapeouts, one for the IO die and one for the 8-core chiplet. For lower core count versions they can simply leave chiplet slots blank: https://img.purch.com/o/aHR0cDovL21lZGlhLmJlc3RvZm1pY3JvLmNvbS81L1IvODEyNzk5L29yaWdpbmFsL0NhcHR1cmUuSlBH https://img.purch.com/o/aHR0cDovL21lZGlhLmJlc3RvZm1pY3JvLmNv...
- paulmd 7y agoConsumer dies use a smaller IO die, so three tapeouts. Epyc IO die will probably be re-used on Threadripper with chiplet slots blank though.
- opencl 7y agoThere are three tapeouts used for the entire desktop, HEDT, and server lineup combined. Everything uses the same 8 core CPU dies and there are two different I/O dies- a smaller one used for desktop (which doubles as the X570 chipset) and a big one for HEDT/server. There's also a separate 4 core + GPU die used for laptop parts.
- juergbi 7y agoThis is correct for desktop and server. However, AMD hasn't said anything about the HEDT I/O die yet, as far as I know. Assuming Zen 2-based Threadripper will still have quad channel memory and 64 PCIe lanes, AMD might go for a medium sized I/O die instead of disabling half of the large server I/O die. Or maybe the Threadripper volume is too low and a separate tapeout is not worth it.
- djsumdog 7y agoDo these processors use NUMA, similar to the high end Intel Xeon chips?
- ip26 7y agoNUMA isn't a feature, it's a design compromise. Ideally every line of memory takes the same amount of time to access. But in large complex designs, you can increase performance for some memory at the price of lower performance for other memory, aka Non Uniform Memory Access. (These chips do exhibit NUMA)
- eightysixfour 7y agoI believe these chips have Uniform Memory Access via a shared memory interface on the I/O die. Am I mistaken? Edit, just confirmed: >Thanks to this improved design, each chiplet can access the memory with equal latency. The multi-core beasts can support to 4TB of DDR4 memory per socket. https://www.tomshardware.com/news/amd-64-core-128-thread-7nm-rome-cpu,38032.html https://www.tomshardware.com/news/amd-64-core-128-thread-7nm...
- ip26 7y agoThey exhibit NUMA because if chiplet0 wants a line of memory that is held by chiplet4, it has to go get it from chiplet4. So the degree of NUMA is improved from the previous generation, but it is still not UMA.
- paulmd 7y agoNo memory is held by any chiplet, it's all held by the IO die and chiplets ask the IO die to access memory for it. So there is no longer "near" and "far". In a sense, it's all "far" now (but hopefully not too far). But it is all uniform now.
- ip26 7y agoThe chiplets have cache, which holds copies of memory. If a process has the line open in an exclusive state, e.g. locked, other chiplets cannot just get the line from memory, because it might be out of date. So they must go ask whoever holds the lock to flush & release. https://en.wikipedia.org/wiki/MESIF_protocol https://en.wikipedia.org/wiki/MESIF_protocol
- deevolution 7y agoWhat's stopping them from creating 1000 core cpus?
- nrki 7y agoHeat, energy usage.
- Ragib_Zaman 7y agoAlso maybe complications involving latency for communication between cores, and memory coherence protocols.
- Symmetry 7y agoYields are the main barrier to single pieces of silicon that big. You have a certain chance of getting a defect per square mm of you chip and as they get bigger the chance of a bad defect gets higher and yields go down. Often they'll occur in a place where you can just disable a core or bank of cache and still sell the chip but not always. So yield rates tend to go down as chips get bigger. Also larger chips make less efficient use of the wafer. Economically, there aren't so many people looking for 1000 cores that it makes sense to put in the NRE to assemble a giant package to put all of that in versus just selling a system that can have multiple sockets. Cooling limits also make spreading out work across multiple sockets a better choice.
- leeter 7y agoSo at a 225w TDP I'd guess that part is going to be clocked in the 1.2 -1.5GHz range. Definitely a specialist part IMO because with only 8 channels of memory that's 1 channel per eight cores which is not a ton of bandwidth. So for workloads that largely stay in the (I assume) ample L3/L2 caches that part will rock. But for anything that needs a lot of bandwidth spread across cores (databases come to mind) it will probably struggle where the higher clocking 24 core or 32 core parts will probably chug on fine. This oddly seems like a case where the 48 core may still be a better buy even for similar workloads due to higher base clocks. Just my two cents.
- juergbi 7y agoIt seems like the 64 core part will be able to run at 2.35 GHz, see https://www.anandtech.com/show/13598/amd-64-core-rome-deployment-hlrs-hawk-at-235-ghz https://www.anandtech.com/show/13598/amd-64-core-rome-deploy...
- leeter 7y agoGood to know I was assuming they'd run a bit hotter. That will actually make the memory situation worse though in many regards.
- cr0sh 7y agoI'm curious if anyone knows about that image of the AMD cpu - it says on it: "DIFFUSED IN USA" What exactly does that mean? Given the next line is "MADE IN CHINA", it would seem like "DIFFUSED" should be "DESIGNED" - or does that word have a new meaning?
- floatboth 7y agoIIUC, diffused is where the silicon wafer is created. For 14/12nm, that's the GloFo fab in New York. Made is where it's attached to the substrate, packaged etc.
- knd775 7y agoDiffusion is a step in manufacturing CPU dies. It generally refers to the following step: http://www.cpushack.com/EtchingWafers.html http://www.cpushack.com/EtchingWafers.html
- deleted 7y ago[deleted]