2 ms·
They already came close in a ton of benchmarks and were faster in others. The biggest issue was AVX. They could run AVX2, but at (effectively) 1/2 clockspeed du
by hajile 7y ago
They already came close in a ton of benchmarks and were faster in others. The biggest issue was AVX. They could run AVX2, but at (effectively) 1/2 clockspeed due to their implementation being 128-bits wide instead of 256-bits like Intel's (which downclocked, but was still faster for non-mixed loads).
AMD now has 256-bit AVX2 units, but unlike Intel, they don't need to downclock due to 7nm TSMC's lower power requirements compared to Intel's 14nm process. This should also affect 128-bit AVX instructions. It should be possible to reorder and push 2 through the pipeline at the same time in a lot of circumstances.
- Dylan16807 7y ago> It should be possible to reorder and push 2 through the pipeline at the same time in a lot of circumstances. To be clear, the existing chips had two 128-bit vector units, and the new ones have two 256-bit vector units. So that would get you 4 total. Also each unit, at least on existing chips, is capable of either a single FMA or a completely independent multiply and add at the same time. I don't think Intel chips can do this?