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Just to clarify, an interesting thing about the BeagleBone is the microcontrollers are inside the main CPU chip.
by kens 8y ago
Just to clarify, an interesting thing about the BeagleBone is the microcontrollers are inside the main CPU chip.
- petra 8y agoWhat's the big advantage it gives ?
- wtracy 8y agoFrom a user/developer perspective, the advantage would be low latency. I imagine that the more interesting advantages are from the perspective of the board designer.
- gmueckl 8y agoYou can get several kinds of guarantees out of these combinations: the microcontroller gives you an environment suitabke for guaranteed timings (not just latency), but also a seperate domain to isolate your software in. So stuff like highly safety critical code goes into the microcontoller (e.g. tight monitoring and control loops) while the complex application fluff (UI, networking, bells and whistles) goes on the main CPU with a big, convenient OS to develop on. And both parts can barely influence each other in unintended ways. There are a lot of boards on the embedded systems market that use e.g. ARMs big.LITTLE architecture for that.
- wtracy 8y agoSorry, I misunderstood the question to mean, "What is the advantage to having the microcontroller on the CPU die, as opposed to having separate chips on the same board."
- gmueckl 8y agoThere are software side advantages as the interconnect between the two can be very different from bus interface like SPI or I2C. Some of these systems offer shared memory between the cores, for example.
- nudgeee 8y agoFor running real-time control algorithms. As an example in a digital power inverter it could be generating PWM signals controlling a H-Bridge while the main CPU deals with UI tasks such as button presses and controlling the LCD screen.
- nomel 8y agoMy personal use case was for hard realtime requirements. For example, burning electronic fuses in an ASIC, where timing had to be guaranteed or the chip was toast. Beyond that, like most have said, bit banging odd protocols at reasonable speed, with full access to main memory for streaming. For a funny optimization that resulted in lower performance: I offloaded one of our protocols to one of these coprocessors but noticed the overall throughput dropped to about 1/4 what it was before, with huge latency between transactions. I looked at the cpu and, as was the goal, main processor usage was down from 30% to about 2%. I eventually realized that, due to the low CPU usage, the main processor clock rate was scaled to the lowest frequency. This caused interrupt handling, and everything else, to slow wayyy down, including the arbiter in the kernel driver and user space code where the transactions were coming from. The fix was to disable clock scaling completely, burning some watts more. I’m sorry dolphins :(
- johnohara 8y agoThe microcontrollers (PRUs) run at 1/5 the clock speed (200MHz) of the CPU (1000MHz) and can share memory with the CPU as well.
- isoprophlex 8y agoSounds like these things are fantastic for DMA-based hacks that use bit-banged GPIO pins to output FM audio, vga video, ...
- monocasa 8y agoYeah, exactly. They're designed for deterministic bit banging of random protocols.
- MegaDeKay 8y agoBetter yet, a 14 channel 100 MHz logic analyzer... https://hackaday.com/2015/02/19/turn-your-beagleboneblack-in-to-a-14-channel-100msps-logic-analyzer/ https://hackaday.com/2015/02/19/turn-your-beagleboneblack-in...
- isoprophlex 8y agoIncredible, thanks!
- amelius 8y agoI'd rather have a bunch of them in a package attached to a bus that connects to the CPU, so it is extensible (i.e. you can add more microcontrollers if desired). It's no problem that the bus has no real time constraints, because the CPU doesn't have them either.