5 ms·

As long as you don't cross a cacheline boundary, I don't believe there is any misalignment penalty on recent x86/ARM processors.

• dpark 8y ago
  Interesting. I wasn’t aware that ARM allowed this at all.
  • avian 8y ago
    It really depends on architecture version and profile. Recent application profiles allow it. On microcontrollers misaligned access is still mostly forbidden as far as I know.
    • api 8y ago
      This inconsistency means you have to assume unaligned access is forbidden in portable code. Fun times.
      • tinus_hn 8y ago
        Most code is not portable at the assembler level and compiler hides this kind of detail.
        • api 8y ago
          In C/C++ you can easily do stuff that violates alignment constraints unless you totally avoid casts or packed structs.
          • tinus_hn 8y ago
            If what you are doing has defined behavior the compiler will make it work, although more slowly.
    • dmitrygr 8y ago
      Allowed in v7m sometimes with a one cycle penalty for data. Not allowed for code. Not allowed for some instructions ( just like x86 requires alignment for some avx inductions)