3 ms·
These include instructions for saturating arithmetic (arithmetic that give the greatest or lowest possible values, rather than wrapping around), 16 and 32 bit f
by lambda 8y ago
These include instructions for saturating arithmetic (arithmetic that give the greatest or lowest possible values, rather than wrapping around), 16 and 32 bit fixed point, fused multiply add instructions, and some SIMD instructions https://en.wikipedia.org/wiki/MIPS_architecture#MIPS_DSP https://en.wikipedia.org/wiki/MIPS_architecture#MIPS_DSP
Basically your usual DSP fare.
ARM has a similar extension; see https://en.wikipedia.org/wiki/ARM_architecture#DSP_enhancement_instructions https://en.wikipedia.org/wiki/ARM_architecture#DSP_enhanceme... for a reference to it, or http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.100166_0001_00_en/ric1417449098079.html http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.... for details.
I don't think that RISC-V has a DSP extension yet; they are still working on nailing down their SIMD/vector extension story.
- wbl 8y agoThey are trying to support vector machines as well as SIMD instructions.
- lambda 8y agoYou mean RISC-V or MIPS? There's a reason why I said SIMD/vector extension, since RISC-V first started down the SIMD route, but then they took a step back and decided that a vector extension might work better, so from what I can tell more work has been going into the vector extension than SIMD. But neither SIMD nor the vector extension are finalized yet. I'm unaware of a MIPS vector extension, it seems to just have standard packed SIMD instructions, though I'm not that familiar with MIPS.