3 ms·

Will it slow down RISC-V?

by glenrivard 8y ago

Derek_MK 8y ago
That basically comes down to whether RISC-V's current partners decide to jump ship for something more well-known.
- nickik 8y ago
  They will not. Important RISC-V companies like SiFive already ship commercial RISC-V that they helped develop. The same for Andes. Esperanto has a RISC-V core that is competitive with top ARM cores already. Western Digital has already committed to RISC-V and released open source cores, invested in RISC-V companies and has multiple products deep in the pipeline. Academic research from Berkley, MIT, ETH and many others is already on RISC-V and they would be crazy to switch, RISC-V is perfect for them. Not to mention that RISC-V is a better instruction set overall.
saagarjha 8y ago
I'm curious to hear the answer for this as well. Given the MIPS and RISC-V are similar in nature, I'm not sure what the impact of making an already widely used and quite mature RISC ISA open source when this was basically the entire premise behind RISC-V.
- nickik 8y ago
  RISC-V is not just to have an open ISA but to have an ISA that is modular and designed in an open process.
zozbot123 8y ago
That's a good question. Did OpenSPARC slow down RISC-V? It's worth noting that, as the article points out, MIPS remains patent encumbered, the ownership situation of these patents is itself quite complex, and all in all, it's not quite clear how the new "Open" licensing will work.
snaky 8y ago
It depends on bunch of small and medium-size Chinese SoC vendors, would they jump to MIPS now, or not. RISC-V is pretty much default ISA among them nowadays.
siffland 8y ago
It depends if they truly open source their stuff, or if they just do their newest items. Their definition of open source and ours might be different as well. I would take everything with a grain of salt until it is truly open sourced and then revisit the question.
ansible 8y ago
In my totally non-expert option, no, it will not slow down RISC-V. The RISC-V instruction set family does benefit from the decades of research since MIPS was first created. Also, a lot depends on the ecosystem surrounding whatever MIPS cores are available. Memory crossbars, interrupt handling, etc. There's a lot that goes into a system-on-chip.
- dbcurtis 8y ago
  > The RISC-V instruction set family does benefit from the decades of research since MIPS was first created. Agree. Also, RISC-V has a business model built around open source, it isn't a desperation move, which is what the MIPS move smells like. Also, RISC-V has mind share right now -- implementing RISC-V variations is now homework sets for MIT 6.004. MIPS is day-old bread.
lambda 8y ago
Probably not at this point. If they had done this right when RISC-V was first announced, then maybe, as at that point they had the advantage of much more ecosystem and tooling integration. However, it's now at the point where there are shipping RISC-V Linux distros, it's supported in GCC and LLVM out of the box, there are more than a dozen open-source RISC-V cores (https://riscv.org/risc-v-cores/ https://riscv.org/risc-v-cores/, several of which are actually parameterized families of cores), and there are companies like SiFive offering commercially supported proprietary cores. There is hardware that has shipped from multiple different vendors, and that likely means that there are a number of others where it's fairly far in the pipeline. With MIPS being behind Intel on the desktop and server market, behind ARM on the proprietary embedded core front, and behind RISC-V on the open source ISA and cores front, it's a bit hard to see why someone would buy MIPS who hasn't already invested in it. If you want something more well established with a wider variety of cores available to purchase, you'd go with ARM. If you want something with no ISA licensing fees and even potentially no charge at all for an open source core, you can go with RISC-V. I suppose there is some chance that MIPS could win some folks over from RISC-V for already having stable SIMD and DSP extensions, and more overall architectural maturity than RISC-V. But given that this seems to just be opening up the ISA without opening up any cores, and right now is a press release without having decided on the governance structure for the project or released any assets, while RISC-V has a number of fairly mature open cores including Rocket, BOOM, RI5CY, and more, and has a governance structure with a number of different companies involved, it seems like it will be a while if ever for MIPS to catch up on the open ISA front.
- snaky 8y ago
  > from multiple different vendors Hundreds. > China is rallying around the architecture with perhaps hundreds of RISC-V SoCs and dozens of cores in the works. > “We are talking hundreds, if not thousands, of [RISC-V–based SoC] projects under way; it’s crazy … probably at least 40 to 50 companies or academic groups are dabbing in core development — some for internal use, some for open-source, and some commercial” https://www.eetimes.com/document.asp?doc_id=1334032 https://www.eetimes.com/document.asp?doc_id=1334032
  - 8y ago

Will it slow down RISC-V?

Derek_MK 8y ago

That basically comes down to whether RISC-V's current partners decide to jump ship for something more well-known.

nickik 8y ago
They will not. Important RISC-V companies like SiFive already ship commercial RISC-V that they helped develop. The same for Andes. Esperanto has a RISC-V core that is competitive with top ARM cores already. Western Digital has already committed to RISC-V and released open source cores, invested in RISC-V companies and has multiple products deep in the pipeline. Academic research from Berkley, MIT, ETH and many others is already on RISC-V and they would be crazy to switch, RISC-V is perfect for them. Not to mention that RISC-V is a better instruction set overall.

saagarjha 8y ago

I'm curious to hear the answer for this as well. Given the MIPS and RISC-V are similar in nature, I'm not sure what the impact of making an already widely used and quite mature RISC ISA open source when this was basically the entire premise behind RISC-V.

nickik 8y ago
RISC-V is not just to have an open ISA but to have an ISA that is modular and designed in an open process.

zozbot123 8y ago

That's a good question. Did OpenSPARC slow down RISC-V? It's worth noting that, as the article points out, MIPS remains patent encumbered, the ownership situation of these patents is itself quite complex, and all in all, it's not quite clear how the new "Open" licensing will work.

snaky 8y ago

It depends on bunch of small and medium-size Chinese SoC vendors, would they jump to MIPS now, or not. RISC-V is pretty much default ISA among them nowadays.

siffland 8y ago

It depends if they truly open source their stuff, or if they just do their newest items. Their definition of open source and ours might be different as well. I would take everything with a grain of salt until it is truly open sourced and then revisit the question.

ansible 8y ago

In my totally non-expert option, no, it will not slow down RISC-V. The RISC-V instruction set family does benefit from the decades of research since MIPS was first created. Also, a lot depends on the ecosystem surrounding whatever MIPS cores are available. Memory crossbars, interrupt handling, etc. There's a lot that goes into a system-on-chip.

dbcurtis 8y ago
> The RISC-V instruction set family does benefit from the decades of research since MIPS was first created. Agree. Also, RISC-V has a business model built around open source, it isn't a desperation move, which is what the MIPS move smells like. Also, RISC-V has mind share right now -- implementing RISC-V variations is now homework sets for MIT 6.004. MIPS is day-old bread.

lambda 8y ago

Probably not at this point. If they had done this right when RISC-V was first announced, then maybe, as at that point they had the advantage of much more ecosystem and tooling integration. However, it's now at the point where there are shipping RISC-V Linux distros, it's supported in GCC and LLVM out of the box, there are more than a dozen open-source RISC-V cores (https://riscv.org/risc-v-cores/ https://riscv.org/risc-v-cores/, several of which are actually parameterized families of cores), and there are companies like SiFive offering commercially supported proprietary cores. There is hardware that has shipped from multiple different vendors, and that likely means that there are a number of others where it's fairly far in the pipeline. With MIPS being behind Intel on the desktop and server market, behind ARM on the proprietary embedded core front, and behind RISC-V on the open source ISA and cores front, it's a bit hard to see why someone would buy MIPS who hasn't already invested in it. If you want something more well established with a wider variety of cores available to purchase, you'd go with ARM. If you want something with no ISA licensing fees and even potentially no charge at all for an open source core, you can go with RISC-V. I suppose there is some chance that MIPS could win some folks over from RISC-V for already having stable SIMD and DSP extensions, and more overall architectural maturity than RISC-V. But given that this seems to just be opening up the ISA without opening up any cores, and right now is a press release without having decided on the governance structure for the project or released any assets, while RISC-V has a number of fairly mature open cores including Rocket, BOOM, RI5CY, and more, and has a governance structure with a number of different companies involved, it seems like it will be a while if ever for MIPS to catch up on the open ISA front.

snaky 8y ago
> from multiple different vendors Hundreds. > China is rallying around the architecture with perhaps hundreds of RISC-V SoCs and dozens of cores in the works. > “We are talking hundreds, if not thousands, of [RISC-V–based SoC] projects under way; it’s crazy … probably at least 40 to 50 companies or academic groups are dabbing in core development — some for internal use, some for open-source, and some commercial” https://www.eetimes.com/document.asp?doc_id=1334032 https://www.eetimes.com/document.asp?doc_id=1334032
- 8y ago