5 ms·
> Contrast this with processor cache. On-die cache is most likely SRAM, Static RAM. It doesn't get refreshed. So the slight voltage errors caused by gamma rays
by blattimwind 8y ago
> Contrast this with processor cache. On-die cache is most likely SRAM, Static RAM. It doesn't get refreshed. So the slight voltage errors caused by gamma rays can slowly build up over time.
Static RAM is basically a flip-flop. It's a bistable circuit that's actively held in a stable state. Single-event upsets work by, essentially, putting the energy into the circuit required to make it transition into the opposite state, i.e. basically the same way the SRAM cell is written to.
- russdill 8y agoIn layman's terms, it's being continuously refreshed.
- throwaway2048 8y agoNo its not, that is what makes it fundamentally different than DRAM.
- atq2119 8y agoYes, it is. That's what makes it fundamentally different from DRAM, which isn't being continuously refreshed, which is why the memory controller has to manually refresh DRAM at frequent intervals. DRAM has much simpler cells, at the cost of more complex control logic. I recommend you just take a look at Wikipedia or something for an explanation of SRAM. Each bit is typically implemented using six transistors, four of which form a loop of two inverters. They are continuously powered, which causes the continuous refresh the parent was talking about.
- zaarn 8y agoThere is no continuous "refresh". The circuit is bistable which means that the system has two states in which, once reached, it will remain until some energy is expended to change that. Imagine it like two valleys with a hill between. Rolling a ball from the OFF valley to the ON valley requires some energy. If it's not enough the ball rolls back into the valley it's currently in. The process is entirely analog, ie, there is no refresh circuit that looks at the voltage and says "that's almost a ON, better fresh up the voltage". The output of the circuit is digital. (You can play with the R/S latches of most SRAM on an oscilloscope and it's quite fun, the output of non-integrated SRAM will react in an analog fashion. If it's integrated, ie has a controller, this is not possible sadly) Until you cross the threshold, the circuit will simply slide back to the original position, once you cross it, it'll slide into the new position without any additional effort.
- atq2119 8y agoThat seems awfully nitpicky in this context. Look at russdill's comment, then look at the throwaway, which is reasonable to interpret as stating that DRAM is being continuously refreshed - which it isn't, it happens at discrete intervals. Anyway, what you're writing isn't wrong but I'd say misses the context of the conversation a bit :) (Also, it's a great example of mansplaining...)
- zaarn 8y agoI'm not mansplaining, I don't even know who you are. You don't know who I am. I'm attempting to make the comment digestible for a broader audience and not only for you. You're not alone on this website. I'm sorry for doing that then. Tbh I find that accusation incredibly rude.
- Dylan16807 8y agoThe explanation you were replying to was more digestible than yours. Your definition of "refresh" is unhelpfully specific and not particularly correct. The circuit that "looks at a voltage and freshens it up", also known as an amplifier, is just a transistor or pair of transistors.
- zaarn 8y agoAn amplifier doesn't look at voltage and "freshens it up", in an SRAM cell, the amplifier is running in clipping and unlike a DRAM cell requires no clocking, only supply voltage. A pair of transistors does not behave like that since they operate over current. You need two inverting amplifier, which is more complex and isn't simply "looking at voltage to freshen in up". If my attempt to make everything more digestible failed in your opinion, then I guess that is it, it's your opinion on the matter.
- Dylan16807 8y ago> An amplifier doesn't look at voltage and "freshens it up" Sure it does, as long as you set the proper bias and use a definition of "fresh" that makes sense for digital signals. > unlike a DRAM cell requires no clocking Yes, that's why it's 'continuous'. > You need two inverting amplifier You don't need to use that design. It just happens to have reasonable size and leakage characteristics. > more complex and isn't simply "looking at voltage to freshen in up" That circuit is a hundred times simpler than the DRAM refreshing circuit you used those words to describe!
- russdill 8y agoIf it's 3.3V logic, and the voltage dips for some reason to 3.0V, it will immediately rise back up to 3.3V. A DRAM cell would stay at 3.0V until the next refresh cycle. That's what I mean by a layman's "continuously refreshed". It has constant input power keeping the voltage at the same level.