5 ms·
I was actually underwhelmed by the post, what exactly is the "pretty bold" change?
by zymhan 8y ago
I was actually underwhelmed by the post, what exactly is the "pretty bold" change?
- throwaway2048 8y agothe incorporation of the IO chiplet is a sea change for processor tech. It means many physically separate core-chipsets get the same path to RAM and overcomes the many issues with NUMA, while avoiding massive and expensive cpu dies.
- loeg 8y agoThe UMA benefit is a double-edged sword. Best-case RAM latency probably gets worse, all else being equal. But maybe they've made Infinity fabric faster enough in Zen2 to eliminate any additional latency compared against the local memory domain in Zen1.
- tutanchamun 8y agoSeperating the analog logic (IO die) from the digital logic (CPU cores). Analog shrinks really bad with smaller nodes wheras digital logic shrinks really good. New process nodes get more and more expensive - especially if the node is new (bad yields etc.) So you want to get the most out of it as possible, which AMD does with this strategy. For example Zen 1 8 core chips are 213 mm2 on 14nm. On 7nm these chipse would be > 106 mm2 (because the analog elements don't scale). Zen 2 chiplets should be at most 75 mm2 (while also increasing cache, widen AVX etc.) which is mobile SoC territory which means they are cheaper to produce (better yields etc.). Since Intel uses monolithic dies AMD already had an cost advatage, with Zen 2 it's not even funny. Especially if the guesses of many people are true and AMD designed the IO chip to be cut down, which means they can reuse it for their desktop CPUs (Ryzen on AM4). Anonther nice advantage of this would be that they can bin the chip even better for EPYC, Threadripper and Ryzen. AdoredTV does a good job of aggregating all the infos/ideas that are floating around and presenting them: https://www.youtube.com/watch?v=I6AG-woscDU https://www.youtube.com/watch?v=I6AG-woscDU
- ploek 8y agoThere is nothing analog about the IO die. It interfaces the memory, and the system's busses like PCIe. They are all digital.
- tutanchamun 8y agoSorry, I've meant analog circuitry, which I've read again and again about on CPUs - see below as one example. And it was also mentioned in some articles about the IO die on Zen 2. > Intel’s analog designers are responsible for creating circuits such as PLLs (for clocking) and PCIe (for I/O) that are critical for modern SoCs on a process that isn’t optimized for analog https://www.realworldtech.com/intel-22ffl-process/ https://www.realworldtech.com/intel-22ffl-process/
- rasz 8y agoits all analog at that level
- Dylan16807 8y agoYeah, anything measured in GHz going off-chip is well into analog signal processing territory.
- Symmetry 8y agoThere's also the clever business reason where they're obligated to keep buying silicon from Global Foundaries but GF had bowed out of pursuing 7nm. So here they can use GF's 14nm for enough silicon to cover their obligations.
- mda 8y agoI/O module is not analog, but most of your points still stand, It is mostly for increasing yields and reducing costs. With this separation they are reducing chiplet size quite a bit, so that they will have superlinear cost reduction on 7nm process.
- rasz 8y ago