5 ms·
What's disappointing is that none of the major cloud vendors has made any real commitments to AMD, at least none that I've seen. If speculative execution is a
by astrodust 8y ago
What's disappointing is that none of the major cloud vendors has made any real commitments to AMD, at least none that I've seen.
If speculative execution is a problem and you need to give each VM its own exclusive cores, great when you can source parts with 64+ cores on them!
- _wmd 8y agoAWS began releasing a new AMD generation a few weeks ago.. https://aws.amazon.com/blogs/aws/new-lower-cost-amd-powered-ec2-instances/ https://aws.amazon.com/blogs/aws/new-lower-cost-amd-powered-...
- astrodust 8y agoFantastic news. Thanks for the link!
- deleted 8y ago[deleted]
- lugg 8y agoHow could they? AMD has been off the map for generations. Providers will begin uptake of AMD again, it just takes time for contracts to roll over and the new hardware to reach production.
- dopenmoredope 8y agoWhat's even more disappointing is that Zen 2 doesn't include support for new techs like the upcoming DDR5 & PCIe 5.0 which seems are going to be supported in Zen 4 https://www.anandtech.com/show/13578/naples-rome-milan-zen-4-an-interview-with-amd-cto-mark-papermaster https://www.anandtech.com/show/13578/naples-rome-milan-zen-4... IC: AMD has already committed that Milan, the next generation after Rome, will have the same socket as Rome. Can you make the same commitment with Zen 4 that was shown on the roadmap slides? MP: We’re certainly committed to that socket continuity through Milan, and we haven’t commented beyond that. Obviously at some point the industry transitions to PCIe 5.0 and DDR5 which will necessitate a socket change. IC: So one might assume that an intercept might occur with Zen 4? MP: No comment (!)
- Scaevolus 8y agoPCIE 4.0 was just standardized last year, it's not surprising that Zen 2 won't support 5.0, which is expected to be introduced mid next year. Zen 2 will be the first CPUs supporting 4.0.
- shaklee3 8y agoPower9 was the first to support it over a year ago. But you're right, 5 is not finalized, so it's not possible for amd to support it.
- dopenmoredope 8y agoRelease date for PCIe 5.0 is Q1 2019 Furthermore... On June 5th, 2018, the PCI SIG released version 0.7 of the PCIe 5.0 specification to its members. PLDA announced the availability of their XpressRICH5 PCIe 5.0 Controller IP based on draft 0.7 of the PCIe 5.0 specification on the same day https://www.plda.com/products/xpressrich5 https://www.plda.com/products/xpressrich5 and... Historically, the earliest adopters of a new PCIe specification generally begin designing with the Draft 0.5 as they can confidently build up their application logic around the new bandwidth definition and often even start developing for any new protocol features. At the Draft 0.5 stage, however, there is still a strong likelihood of changes in the actual PCIe protocol layer implementation, so designers responsible for developing these blocks internally may be more hesitant to begin work than those using interface IP from external sources. From here: https://en.wikipedia.org/wiki/PCI_Express https://en.wikipedia.org/wiki/PCI_Express AMD had plenty of time to include PCIe 5.0 even in the Draft 0.7 stage which is pretty much the same as final draft/release, but decided not to.
- IntelMiner 8y agoYes. AMD could have simply switched the chip over to non-finalized standards between June 5th and now. Clearly No possible way that could backfire or be impossible
- Tuna-Fish 8y ago> AMD had plenty of time to include PCIe 5.0 even in the Draft 0.7 stage which is pretty much the same as final draft/release, but decided not to. ... Just how long do you think it takes to make that kind of design changes? This requires a major change in silicon. It would have had to been done more than a year ago.
- Twirrim 8y agoAWS, Microsoft, Oracle, Packet... all have AMD shapes, in bare metal and VM to varying degrees. The list goes on and on. Oracle: https://www.amd.com/en/press-releases/2018-10-23-amd-and-oracle-collaborate-to-provide-amd-epyc-processor-based-offering https://www.amd.com/en/press-releases/2018-10-23-amd-and-ora... Azure: https://azure.microsoft.com/en-us/blog/announcing-the-lv2-series-vms-powered-by-the-amd-epyc-processor/ https://azure.microsoft.com/en-us/blog/announcing-the-lv2-se... AWS: https://aws.amazon.com/about-aws/whats-new/2018/11/introducing_amazon_ec2_instances_featuring_amd_epyc_processors/ https://aws.amazon.com/about-aws/whats-new/2018/11/introduci... Packet: https://www.packet.com/hardware/amd/ https://www.packet.com/hardware/amd/
- ahoka 8y agoLV2 is invite only on Azure, eg. not generally available.
- apexalpha 8y agoOff-topic but eg = for example, ie = in other words.
- Kipters 8y agoThanks, as a non native speaker this is very useful for me
- cantankerous 8y agoFWIW nobody's been a native Latin speaker for a thousand-plus years. You're in the same boat as everybody else! ;-)
- Kipters 8y agoTrue, but the problem is that my language (Italian) only uses "es." for "e.g." and doesn't have an equivalent acronym for "i.e." (we usually use other complete words that roughly translate to "therefore"), so it's easy for me to mix them up since I can't easily map them.
- deleted 8y ago[deleted]