3 ms·
how often can 64 cores be effectively utilized without bumping up on memory throughput as a limiter? This is pretty challenging at 32 cores! I know these chip
by gameswithgo 8y ago
how often can 64 cores be effectively utilized without bumping up on memory throughput as a limiter?
This is pretty challenging at 32 cores! I know these chips ship with big l3 cache but l3 cache isn't so fast either.
- imtringued 8y agoI'm wondering if we will ever reach a point at which even interpreted languages will be bottlenecked on memory bandwidth rather than cache misses.