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As someone who is working on an asynchronous process myself, I should remind you that asynchronous is more a design level choice rather than a magic bullet that
by deepnotderp 8y ago
As someone who is working on an asynchronous process myself, I should remind you that asynchronous is more a design level choice rather than a magic bullet that makes everything better.
In particular, in CPUs with a big centralized register file there can be significant overhead to having an asynchronous CPU.
There are certain architectural cases in which it can be a killer advantage or other cases in which it is pretty much the only way forward (e.g. in a 3D chip it can be quite difficult to distribute a high speed, high quality/low skew+jitter clock)
- Dylan16807 8y ago> (e.g. in a 3D chip it can be quite difficult to distribute a high speed, high quality/low skew+jitter clock) How thick is "3D" here, and why is that? What makes a bit of vertical distance harder than several mm of horizontal distance?
- DarkWiiPlayer 8y agoMaybe the electrons need to wait for the elevator?
- insonifi 8y agoI believe troubles are caused by induction effect from adjacent layer (similar to self-inductance[0]). [0] - https://en.wikipedia.org/wiki/Inductance#Self-inductance_of_a_wire_loop https://en.wikipedia.org/wiki/Inductance#Self-inductance_of_...
- simcop2387 8y agoNot just inductance, but capacitance between the layers themselves too since you've got to have an insulator between them. All the fun things you get in 2d from nanometer scale devices are now compounded in another degree of freedom. The only thing I don't think you have to work around is quantum tunneling between layers because they'll probably be too far apart still to need that level of work.
- deepnotderp 8y agoIt's hard more due to EDA tool reasons than due to physical reasons :) Which incidentally, is also the main reason why asynchronous logic isn't more popular.
- thesz 8y agoThe overhead you are talking about is scoreboard, mainly - clockless CPU cannot assume readiness of the results when issuing commands, and it needs scoreboard of what is ready to issue commands without conflicts. But scoreboarding allows for most gains of out-of-order execution and is cheap.
- deepnotderp 8y agoYeah, but most CPUs today are OoO without using scoreboarding
- thesz 8y agoYou may have associative memory for speculation (most probably, you refer to it above), but you need to have scoreboard for operation to be issued without conflict and with operands ready.