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ARM releases free Cortex-M processor cores for FPGAs
- phsilva 8y agoLet the battle begin! Wonder how RISC-V movement in the open source ISA front has influenced this decision.
- ingenieroariel 8y agoSounds really good. Is it only free as in free beer or editable too? The interesting applications for RISC-V are Vector Extensions and other application specific mods.
- phire 8y agoBeer. Pretty sure they will be precompiled RTL blobs.
- wyldfire 8y agoNot even. You have to pay a royalty to ship one of these M0 designs, still. It's just designed to be more appealing to research.
- slededit 8y agoThe blog post said royalty free though... I agree its not exactly super clear.
- duskwuff 8y ago> Pretty sure they will be precompiled RTL blobs. They are. Encrypted, too.
- exikyut 8y agoUgh. That's all I needed to know. (Thanks.) There goes a very large pile of potential security research out the window.
- duskwuff 8y agoThat all being said, my sources tell me that tools exist which can decrypt the .vp files. It's still not going to be particularly readable, but at least it's available for analysis.
- exikyut 8y agoHmm. Well, I get the impression the tools you mention are probably less hens-teeth than the ARM bitstream files ever were, so this development is pretty cool then.
- kbumsik 8y agoIt is for Xilinx FPGAs only so at least it is not open-source friendly.
- ISL 8y agoCame to the comments for the same question. The difference between beer and speech is important here, as the impact of a free-as-in-speech open-source design would be substantial. Either way, thanks, ARM!
- Palomides 8y ago"DesignStart Eval enables completely free access to fixed-configuration Cortex-M0 and Cortex-M3 and full subsystem RTL for evaluation, prototype, teaching, and research. Available to all*, the packages can be downloaded instantly, requiring only a simple click-through agreement. " and if you want to make a product, "DesignStart Pro enables access to the full Cortex-M0, Cortex-M3, and subsystem RTL. Available to companies for commercial use with a no-risk, $0 license fee and success-based royalty model. Access to the IP can be requested online, requiring the signing of a simplified license agreement." so free as in... kinda freeish free trial.
- mycall 8y agoWhat's in that license agreement.. blood?
- jeanmichelx 8y agoYou can add custom memory-mapped hardware though
- kbumsik 8y agoWow, not only FPGA-optimized Cortex-M1, they also releases Cortex-M3, one of the most popular MCU IP. BTW, are there many applications integrating a MCU core with FPGA rather than a AP core? I only have seen Xilinx products that uses Cortex-A core.
- monocasa 8y agoIt's not unheard of to throw a soft core in there too, but in the past it'll be something like a Microblaze. An MCU vs. an AP are pretty orthogonal as it's pretty hard to cycle counting real time determinism out of an AP.
- TomVDB 8y agoSuper small CPU cores are fantastic for complex FSM replacement, especially on an FPGA which has unused block RAMs (so using them is essentially free.) I’ve seen cases with relatively complex pure HW FSM being replace by a small CPU and 1KB of RAM where the logic used by the CPU ends up smaller than the FSM. But now the CPU is programmable, so you can iterate much quicker in case of bugs, without the need to reaunthesize. A good example are SDRAM controllers: almost all of them have a small CPU inside the controller that is used for calibration training.
- noselasd 8y ago> BTW, are there many applications integrating a MCU core with FPGA rather than a AP core? I only have seen Xilinx products that uses Cortex-A core. It's common enough that you'll have them available as part of the FPGA toolchain , Xilinx has Picoblaze/Microblaze and Altera has NIOS-II
- vanjoe 8y agoYeah the newer zynq-MP have a 4 core A53 as well as two realtime class cores on there.
- neuromancer2701 8y agoThose are actually silicon hardware cores all of these are soft-core applications.
- LogicCowboy 8y agoThis is ARM's definite response to RISC-V. As people develop their FPGA products, they will have to decide what their long term target is. If the intent is to eventually turn the code into an ASIC, RISC-V maybe the economically more sensible solution since there is no licensing costs there. However they will have to be patient with the toolchain. If the idea if the code will only be a pet project, wouldn't benefit from RISC's customization abilities, or long term is expected to use an ARM core, this is definitely the right pick. The ARM toolchain being more mature is a draw for many hardware developers. I'm definitely very interested in trying a project with either RISC-V or ARM.
- Zenst 8y agoEqually by offering this for Xilinx, it makes them more palatable over Altera offerings (owned by Intel). So a very tactile move on many levels. But as an end user, I like competition like this, as long as there is competition tomorrow.
- nerpderp83 8y agoThere are lots of other FPGAs that are still available for RISC-V to target that are precluded from this announcement. ARM used to sue anyone trying to make an ARM clone and now this. Great news for RISC-V. At least one if not two low end FPGA manufacturers will be shipping a fabric with hard blocks supporting RISC-V.
- JoachimS 8y agoThe release of the M1 is not just for Xilinx. ARM is releasing the M1 for Xilinx, Altera, Actel FPGAs. These are firm (i.e. technology mapped) cores adapted for each FPGA family. Here for example is the documentation for the Altera version. Note that it sports the Altera Avalon bus interface which would not be used in a Xilinx design. https://developer.arm.com/docs/dui0395/latest/introduction/about-the-processor https://developer.arm.com/docs/dui0395/latest/introduction/a... And here is the announcement/information about the M1 core for Actel/Microsemi FPGAs: https://soc.microsemi.com/products/ip/search/detail.aspx?id=652 https://soc.microsemi.com/products/ip/search/detail.aspx?id=...
- valarauca1 8y agoThe commetization of the CPU market was bound to happen eventually. As modern production techniques for chips and FPGA programming start to converge rapidly. What is the ETA until we get a GNX "GNX is Not X86"? An Open source i386 core that people can run existing applications on? Much like GNU offered a standardized FOSS platform people could run existing Unix workloads on.
- Taniwha 8y agoA great question .... all the 386 patents are out of date now right?
- chasil 8y agoThe wikipedia page says that AMD64 must be licensed from AMD. The market for a new 32-bit x86 clone would not be large. https://en.wikipedia.org/wiki/X86 https://en.wikipedia.org/wiki/X86 "...x86-64 may require an additional license from AMD."
- Taniwha 8y agoYeah but a 386 and an x86-64 are quite different things ....
- Dylan16807 8y agoThat changes in a couple years though.
- monocasa 8y agoThey are. We're pretty close to Pentium Pro in terms of patent expiration.
- makapuf 8y agoDo you know of any worthwhile patent as in general enough to be reused in a different chip but advanced enough to be a current blocker and not replaced by another technique or is it just to protect i686 proprietary elements ?
- paulgerhardt 8y agoThe press release linked by OP doesn't give the full story. For a better perspective see https://abopen.com/news/arm-offers-free-as-in-beer-cortex-ip-to-combat-fossi-threat/ https://abopen.com/news/arm-offers-free-as-in-beer-cortex-ip... If you're just joining us, Arm very much sees the up and coming RISC-V stack as an immediate threat to the future of their business and is taking pro-active countermeasures - doing everything from awkward, backfiring smear campaigns against RISC-V[1] to straight up license dumping their own product to prevent developers jumping ship. It's interesting to see because RISC-V is wonderful and Arm seems to recognize that. Arm Holdings is acting rationally as someone in a privileged competitive position would do. At the same time, big players like Western Digital are migrating to RISC-V so Arm is internally freaking out [2]. [1] https://www.theregister.co.uk/2018/07/10/arm_riscv_website/ https://www.theregister.co.uk/2018/07/10/arm_riscv_website/ [2] https://www.theregister.co.uk/2017/12/01/wdc_risc_v_edge_strategy/ https://www.theregister.co.uk/2017/12/01/wdc_risc_v_edge_str...
- dang 8y agoOk, we changed the URL to that from https://www.arm.com/company/news/2018/10/arm-expands-design-possibilities-with-free-cortex-m-processors-for-xilinx-fpgas https://www.arm.com/company/news/2018/10/arm-expands-design-.... Thanks!
- sweden 8y agoWhy did we change from an official press release with some content to some random blog post?
- faragon 8y agoI would love ARM releasing ARM1 and ARM2 processors (both with a 3-stage pipeline) for FPGAs, not because of economical interest, but because of historical and coolness purposes. And more, so you could e.g. run a synthesized Acorn Archimedes from a FPGA, for free, running Linux on top of it :-)
- monocasa 8y agoThey come close to that here, a gate level simulation of an ARM1. http://visual6502.org/sim/varm/armgl.html http://visual6502.org/sim/varm/armgl.html
- jacquesm 8y agoThat's how the ARM1 was made in the first place: by being simulated. On a BBC Model B. First silicon worked, which nobody really expected but they surprised themselves.
- spilk 8y agoso how many LE's do these cores consume compared to a similar RISC-V or any other CPU design? Are there advantages just beyond familiarity of ARM?
- stcredzero 8y agoHow suitable is RISC-V for military use? If we were to redesign the F-16 from scratch in 2018, would be able to make it using hardened Arm or RISC-V chips in place of x86 processors?
- mmirate 8y agoThe avionics and EW systems are probably being redesigned on a much more regular basis than ... well, than almost any other component of a fighter.
- mycall 8y agoI wouldn't assume the F-16s have Von Neumann.
- fooker 8y agoDo you have a source for this?
- nickik 8y agoDARPA is has RISC-V projects. There was a Keynote by DARPA: https://www.youtube.com/watch?v=9hIA4ZIXtxA https://www.youtube.com/watch?v=9hIA4ZIXtxA https://content.riscv.org/wp-content/uploads/2017/12/Wed-1042-RISCV-Open-Source-LintonSalmon.pdf https://content.riscv.org/wp-content/uploads/2017/12/Wed-104... I think the RISC-V startup called 'Denver' is also working with DARPA.
- mrtweetyhack 8y agoWe all know why, RISC-V
- mmirate 8y agoSingle-digit Cortex-M models? Dinosaurs, all. Hold your applause until we can see the innards of an AArch64 implementation.
- jononor 8y agoSeveral billions of such chips are shipped per year. Many established segments are still moving from 8 bit to 32 bit micros, and new segments are still growing rapidly. So shipments of Cortex-Mx devices is likely to grow quite a bit still.
- duskwuff 8y agoCortex-M is still highly relevant in embedded development. While some double-digit Cortex-M cores theoretically exist (Cortex-M23, -M33, and -M35P), there are virtually no parts in production which use them; the current state of the art is Cortex-M7.
- deleted 8y ago[deleted]
- stevefan1999 8y agoWhy did the article claim that "Free and Open Source Silicon" is a threat to ARM? Thinking further, we already have RISC V up and running, but doesn't it really impact traditional chip OGs like ARM and Intel?
- nickik 8y agoOf course RISC-V impacts ARM and to a lesser extent Intel. Most costumer that goes to RISC-V would have picked ARM. Of course changes like that don't happen in 1-2 years. RISC-V is still young, 2015 is when it actually went public with the foundation. Not to mention that back then many things we not frozen, so now basically everything you need for a Linux stack is frozen.
- jhallenworld 8y agoWill there be a version for Lattice FPGAs? These are more interesting targets because they are lower cost than Altera or Xilinx.
- peter_d_sherman 8y agoFree != Open Source. Are NDA's/vendor secrecy required? Is the core, in whatever form it is provided in, not obfuscated in any way, and well documented? Does ARM permit companies using it to modify the design? Free != Open Source.