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I don't understand why. Could you elaborate more? Isn't the whole point of reducing the minimum feature size to increase the number of transistors that you can
by whoisjuan 8y ago
I don't understand why. Could you elaborate more? Isn't the whole point of reducing the minimum feature size to increase the number of transistors that you can pack in a layout or in other words the smaller the node, the more density you get and therefore more processing power with less energy consumption? How is that not supposed to impact performance?
- 40acres 8y agoYou're correct, smaller features will improve performance. What I'm saying is that it is becoming so expensive and difficult to get high yield on smaller feature size that from a product generation to product generation other performance features (like the ones I mentioned before) will be the main factor to improved performance. You can see this with Intel right now: CannonLake (10nm) has been delayed due to yield issues but KabyLake, Coffee Lake & Whiskey Lake (14nm) are all improvements over the original 14nm product (Skylake).
- mooman219 8y agoThe gist of what's being said on this post and the thread on Apple's video is that everyone is generally around the same size for various features. So we might get marketing speak that we're on "10nm" or "7nm" or "5nm", but that doesn't correlate to much. Just like "4G" and "5G" technically mean something, that doesn't mean the carrier offers speeds remotely close to the specification they say they provide. Features lists generally include the transistor gate pitch, interconnect pitch, transistor fin pitch, and transistor fin height. None of these features are actually "10nm" or "7nm, but range anywhere between 30nm-60nm. Although sources are conflicting online, it looks like Intel 10nm is about on par with TSMC 7nm. Some features for Intel's 10nm are larger, while others are smaller than TSMC 7nm. Also _most_ sites are saying Intel 10nm has a higher transistor density, but information is kind of flaky on this metric.
- TylerE 8y agoThe way I understand, it’s really more like minimum feature size (like think a trace/wire and not a transistor). So it’s more like a sort of DPI measurement
- sehugg 8y agoOr like CPU clock speeds, which have never correlated directly with performance across families, even when comparing something as old as the 6502 vs. Z80.
- umanwizard 8y agoIt's not quite the same thing, since CPU clock speeds do in fact have a well-defined meaning.
- close04 8y agoIt's starting to get murky. We're back to the point where not everything runs at the same speed (take AVX for example [0]). Add to that that some of the frequencies are turbo, and specific frequencies are only achieved under very specific load conditions, etc. You get something that physically is very clearly defined but in practice it's not. Just like the minimum feature size which doesn't tell you much about the rest of the transistor. Perhaps if they used an average feature size it would make more sense for the regular person. So how are the fabrication sizes different from the frequency that gets advertised on the box? "Oh that? It's only when you load one core. And don't run anything using these specific instructions. And when the temperature isn't too high. And...". [0] https://www.tcm.phy.cam.ac.uk/~mjr/IT/clocks.html https://www.tcm.phy.cam.ac.uk/~mjr/IT/clocks.html
- phyller 8y agoYea but TSMC's "7nm" is definitely smaller than Intel's "14nm"(+++), which is what Intel is actually on right now, and will be for at least another year.
- whynotminot 8y agoWhat's funny about this still though is that people keep saying TSMC's 7nm is roughly equivalent to Intel's 10nm like that somehow scores points for Intel... even though Intel hasn't been able to ship their 10nm process for shit. So no matter how you slice it Intel has fallen behind.
- robdachshund 8y agoAgreed. Every time I hear this I doubt it entirely. If you are at a smaller size you can pack in more transistors. Does Intel have magic transistors that perform better than smaller ones? No... they are basic logic gates.
- mapt 8y agoA few generations ago they just stopped being able to reduce minimum feature size. Instead they're working on some kind of hypothetical combination of work-per-watt and transistors-per-centimeter, ignoring additional layers.
- AgentOrange1234 8y agoDo you have a source that backs this up? I am under the impression that 7nm is a marketing term but that it is still smaller than the previous node.
- 6nf 8y agoYea that's all true. The problem is consistently defining what exactly constitutes a 'feature'. Intel's 10nm features are smaller than Intel's 13nm features but it's harder to compare Intel 10nm to other companies' 10nm processes. Or at least that's how I understand it. At the end of the day the chips are now physcially small enough to do whatever we want so it's more useful to directly compare power consumption rather than the implementation details. After all, if a 10nm Intel chip can give you the same output per joule and per second as a 7nm Apple chip, does it really matter how big the transistors are?