5 ms·

Well, if you EE guys would finally got off your high horses and dropped Verilog in favor of JavaScript, we wouldn’t have this kind of problem!!!

StavrosK 8y ago
Sure, the circuits might catch fire once in a while, but imagine the ease of development when you can get a bunch of underqualified people to develop stuff!
wishart_washy 8y ago
I left EE and became a full-stack developer! No complaints about JavaScript here. Verilog should just switch to lambdas and get it over with.
- TimTheTinker 8y ago
  Same here. Switched to CS from EE and never looked back, although my respect for EE majors increased a lot. (I had trouble with the continuous math once we reached steady-state analysis. Besides, I wanted to just get through all that to the fun stuff: discrete math, logic design, and programming.)
  - ultrasounder 8y ago
    On that path after 12 years of blood and sweat as a HW engineer in various FAANG companies. Self teaching myself Algos so that I can eventually leetcode the day light out of my life and take a crack at the same FAANG this time as a SW engineer. The problem with the whole EE landscape is much beyond the Mandarin syndrome. It’s systemic. In fact the canary in the coal mine is Berkeley where the enrollment in graduate level EE courses in analog circuit design and RFIC have been falling rapidly as more and more grads prefer the “deep learning” bandwagon much more than the traditional popcorn chip design and manufacturing which was the mainstay of the local Silicon Valley economy until I was in grad school. Back to my BFS study from clrs :-)
deepnotderp 8y ago
I know you're joking, but Verilog isn't really the best language... I mean, it wasn't even made for chip synthesis.
garmaine 8y ago
I know you’re joking, but look at Chisel or Clash.
allegedganon 8y ago
Funny, and beneath the joke lies a nice nugget of truth: the landscape of hardware design languages is a truly sad thing to behold and deeply hinders innovation in the space. There are numerous attempts at fixing the problem, but all of them ring hollow as the big ASIC design shops basically are all relying on ancient languages. Another thing that IMO has dealt a grave blow to the whole scene is a cultural one: people in the hardware business still haven't understood and digested the lessons of open source and sharing. The whole industry still operates on notions of "industrial secrets" and spends tremendous amounts of energy trying to hide how what they build works. I mean if you need a example of how bad it still is, the dominant word still used to describe a chunk of functionality in that world is "IP". Who in their right mind in the software industry would call a piece of code they wrote "intellectual property", as in "just download my IP and use it in your project" ?
- BrannonB 8y ago
  If you think Verilog is bad, you should see the languages used by heart surgeons, civil engineers and rocket scientists. The language of human biology is ridiculously verbose without even a hint of polymorphism. ;-) My point is that it's a little silly to evaluate hardware engineering through the lense of software engineering. In hardware engineering the part that looks like "software" (what a HW engineer may refer to as the behavioral RTL) is a small component of the total design effort. The tradeoffs are all completely different. Computer hardware engineering is much closer to designing a bridge than it is to writing a software application. Debating the best hardware-descriptor language is similar to debating whether bridge designers should use No. 1 or No. 2 pencils.
  - krupan 8y ago
    Sorry, but that comment makes it sound like you've either never used pencils, or you have never used verilog.
    - BrannonB 8y ago
      25 years of high performance chip design. Perhaps you’re an FPGA guy? The tradeoffs are different in that world.

StavrosK 8y ago

Sure, the circuits might catch fire once in a while, but imagine the ease of development when you can get a bunch of underqualified people to develop stuff!

wishart_washy 8y ago

I left EE and became a full-stack developer! No complaints about JavaScript here. Verilog should just switch to lambdas and get it over with.

TimTheTinker 8y ago
Same here. Switched to CS from EE and never looked back, although my respect for EE majors increased a lot. (I had trouble with the continuous math once we reached steady-state analysis. Besides, I wanted to just get through all that to the fun stuff: discrete math, logic design, and programming.)
- ultrasounder 8y ago
  On that path after 12 years of blood and sweat as a HW engineer in various FAANG companies. Self teaching myself Algos so that I can eventually leetcode the day light out of my life and take a crack at the same FAANG this time as a SW engineer. The problem with the whole EE landscape is much beyond the Mandarin syndrome. It’s systemic. In fact the canary in the coal mine is Berkeley where the enrollment in graduate level EE courses in analog circuit design and RFIC have been falling rapidly as more and more grads prefer the “deep learning” bandwagon much more than the traditional popcorn chip design and manufacturing which was the mainstay of the local Silicon Valley economy until I was in grad school. Back to my BFS study from clrs :-)

deepnotderp 8y ago

I know you're joking, but Verilog isn't really the best language... I mean, it wasn't even made for chip synthesis.

garmaine 8y ago

I know you’re joking, but look at Chisel or Clash.

allegedganon 8y ago

Funny, and beneath the joke lies a nice nugget of truth: the landscape of hardware design languages is a truly sad thing to behold and deeply hinders innovation in the space. There are numerous attempts at fixing the problem, but all of them ring hollow as the big ASIC design shops basically are all relying on ancient languages. Another thing that IMO has dealt a grave blow to the whole scene is a cultural one: people in the hardware business still haven't understood and digested the lessons of open source and sharing. The whole industry still operates on notions of "industrial secrets" and spends tremendous amounts of energy trying to hide how what they build works. I mean if you need a example of how bad it still is, the dominant word still used to describe a chunk of functionality in that world is "IP". Who in their right mind in the software industry would call a piece of code they wrote "intellectual property", as in "just download my IP and use it in your project" ?

BrannonB 8y ago
If you think Verilog is bad, you should see the languages used by heart surgeons, civil engineers and rocket scientists. The language of human biology is ridiculously verbose without even a hint of polymorphism. ;-) My point is that it's a little silly to evaluate hardware engineering through the lense of software engineering. In hardware engineering the part that looks like "software" (what a HW engineer may refer to as the behavioral RTL) is a small component of the total design effort. The tradeoffs are all completely different. Computer hardware engineering is much closer to designing a bridge than it is to writing a software application. Debating the best hardware-descriptor language is similar to debating whether bridge designers should use No. 1 or No. 2 pencils.
- krupan 8y ago
  Sorry, but that comment makes it sound like you've either never used pencils, or you have never used verilog.
  - BrannonB 8y ago
    25 years of high performance chip design. Perhaps you’re an FPGA guy? The tradeoffs are different in that world.