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>programmability remains the big problem for FPGAs I agree because there's added levels of complexity with HDLs that SW doesn't have to deal with. What would b
by vegetablepotpie 8y ago
>programmability remains the big problem for FPGAs
I agree because there's added levels of complexity with HDLs that SW doesn't have to deal with. What would be nice is if there was a tool that you could declare your problem (functions) and your constraints (throughput, LUTs available) and it would figure out the memory, ALUs and pipe-lining needed to solve the problem.
- meuk 8y agoThat is called high-level synthesis and there are some tools for this available (and I know at least one company who produces a proprietary toolchain - including hardware - for this). In my experience, high-level synthesis makes things a lot easier for the programmer, but you still have to be aware of very low-level details (and you still can get bitten by abstractions that you don't fully understand).
- exikyut 8y agoThat company might fruitfully make their system available within a datacenter / "VPS"-type context, eg the way Cloud9 does it. (https://c9.io/ https://c9.io/, you make a free account, you instantly get a Web based editor connected to a Debian VM) If their system accepts "mostly ordinary" code in eg C, a fair amount of stuff would probably work with it, so it could scale beyond educational exploration/tinkering, too.
- esmi 8y agoLike this? https://www.mathworks.com/solutions/fpga-design.html https://www.mathworks.com/solutions/fpga-design.html
- sehugg 8y agoThere are plenty of C-to-HDL languages (https://stackoverflow.com/questions/8988629/can-you-program-fpgas-in-c-like-languages https://stackoverflow.com/questions/8988629/can-you-program-...) and there's some interesting tidbits about them in this SO link.