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> I wouldn't be surprised if Intel came up with tools which help make use of the FPGA using higher languages like C. These (almost by necessity) make you write

by slrz 8y ago

> I wouldn't be surprised if Intel came up with tools which help make use of the FPGA using higher languages like C. These (almost by necessity) make you write code that doesn't look like any other C code. You can't just use some pre-existing C library and compile it to use FPGA resources. At that point, why not go a step further and just use a proper HDL?

ktta 8y ago
Because although HDL doesn't look difficult syntax wise, it requires a very good understanding of logic gates. People need to pretty much take a course in digital design to be able to write something meaningful. It took me a while to grok HDL and write working code (good, maintainable code aside) even though I took digital design courses.
- SlowRobotAhead 8y ago
  HDL ISNT CODE. FPGAs don’t get firmware. HDL is a description of hardware.
  - deleted 8y ago
    [deleted]
  - ktta 8y ago
    There's no need for all caps. HDL can be referred to as code. And I do know what HDL is and what FPGAs are, thank you.
    - SlowRobotAhead 8y ago
      >HDL can be referred to as code. No, it can't. That's why the caps are there and I'm sticking to it. You basically justified it ;) Code is something that you design to run sequentially. HDL is a description of gates and logic that runs all at the same time. If you wanted to argue that the bitstream is firmware - that's a tougher discussion.
      - perl4ever 8y ago
        If code is inherently sequential, do you think that there is no such thing as "code" in functional programming languages?
imtringued 8y ago
>At that point, why not go a step further and just use a proper HDL? You're assuming that you're starting with an FPGA only project. In reality most projects that are going to be accellerated with these Xeon+FPGA systems is existing software where only a handful of hotspots will have be ported to the limited C language which is significantly less effort than rewriting the entire algorithm in HDL.

by slrz 8y ago

ktta 8y ago

Because although HDL doesn't look difficult syntax wise, it requires a very good understanding of logic gates. People need to pretty much take a course in digital design to be able to write something meaningful. It took me a while to grok HDL and write working code (good, maintainable code aside) even though I took digital design courses.

SlowRobotAhead 8y ago
HDL ISNT CODE. FPGAs don’t get firmware. HDL is a description of hardware.
- deleted 8y ago
  [deleted]
- ktta 8y ago
  There's no need for all caps. HDL can be referred to as code. And I do know what HDL is and what FPGAs are, thank you.
  - SlowRobotAhead 8y ago
    >HDL can be referred to as code. No, it can't. That's why the caps are there and I'm sticking to it. You basically justified it ;) Code is something that you design to run sequentially. HDL is a description of gates and logic that runs all at the same time. If you wanted to argue that the bitstream is firmware - that's a tougher discussion.
    - perl4ever 8y ago
      If code is inherently sequential, do you think that there is no such thing as "code" in functional programming languages?

imtringued 8y ago

>At that point, why not go a step further and just use a proper HDL? You're assuming that you're starting with an FPGA only project. In reality most projects that are going to be accellerated with these Xeon+FPGA systems is existing software where only a handful of hotspots will have be ported to the limited C language which is significantly less effort than rewriting the entire algorithm in HDL.