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Can someone explaing why it's important to increase the density instead of increasing the size of a CPU? Knowing nothing about chip design I'm probably thinkin

Can someone explaing why it's important to increase the density instead of increasing the size of a CPU? Knowing nothing about chip design I'm probably thinking about this the wrong way but socket backwards compatability aside is it not feasible to simply increase the chip size? Is a higher density more rewarding?

dracyr 8y ago
It is basically an issue with the thermal capacity of the chip, larger size means more heat.
- snuxoll 8y ago
  This right here is the big one, to be honest. Yes, clocks, latency between parts of the die, etc are all problems - but they can be worked around with some effort. Thermals and also power delivery are huge problems with large chips, just compare the massive 471 mm2 die of the GP102 (1080 Ti/Titan X) to the 150 mm2 die of the Coffee Lake hexacore chips. GP102 can draw 250-300W depending on boost clock, the Core i7-8700K can also draw upwards of 200W depending on how high you push the clocks and vCore (to keep said clocks stable). There's a reason why board-partner GPU's always have huge coolers attached to them, and why people pushing CPU clocks are often using at least a giant air cooler like the Hyper 212 EVO or an AIO liquid cooler with a 240mm+ radiator. Hell, let's skip thermals and just talk electricity - getting 200W+ of stable power to the cores on these dies is no easy task as-is, that's why you have people like buildzoid doing reviews of power delivery on motherboards and GPU boards to see if VRM's are going to blow up trying to power your expensive hardware if you're overclocking (or sometimes even if you aren't). All in all, we have thermal and power scaling issues at current chip sizes - making them bigger isn't particularly feasible unless everybody is going to start installing 360mm radiators in their system and even that might not be enough depending on clock speeds and the vCore required to maintain them.
  - dogma1138 8y ago
    8700K pushes 130W at 5ghz all Core OC under full AVX load without offset even uner LN you won’t get 200W from a 8700K.
dizzystar 8y ago
I asked someone who worked on chips a similar question. The density helps connecting the parts. If the nodes aren't near each other, they have to move through other nodes to get from one to the other, and that process is "slow" in the world of chips. I guess it's like trying to get from LA to SF. You could get to SF of you 10x'd the size of earth, but it would still more than 10x as long despite having the same connections because you'd need to stop for some extra connections to even make it.
Const-me 8y ago
One reason is cost. Large size means there’re fewer chips produced per wafer, which means every single chip will cost more, proportionally to the area of a single chip. Another reason is yield. Defects are inevitable. Their probability per unit of area is roughly constant, i.e. it doesn’t depend on the area of a single chip. Therefore, the probability of one or more defects on a single chip is proportional to the exponent of the chip area. With larger chips, that exponent grows very quickly.
- heavenlyblue 8y ago
  You can always separate the chip into smaller cores and disable the ones that don't work.
  - Const-me 8y ago
    The tactics works well for GPUs. But for CPUs, you only can do that sometimes, not always. Cores only make about half of the area. If the error is not in a core but in e.g. RAM controller or IO controller, you have to throw away the complete chip.
baybal2 8y ago
>Can someone explaing why it's important to increase the density instead of increasing the size of a CPU? If you compare semiconductors to crops, this determines how much bucks you get from an acre of silicon wafer.
- jeremejevs 8y ago
  I do believe that the savings from getting more dies out of a wafer are non-negligible (wafers themselves are somewhat cheap, but the equipment they're wearing out with each pass - not so much), but my guess is that they aren't the main driver behind the process shrinking.
Nokinside 8y ago
Power, heat and the speed of electrical signal. Power use increases quadratically with voltage. You want small transistors to keep the voltage and power use from getting out of hand. You also need to increase voltage if you want to increase clock speed. Electric signal travels in a conductor roughly 15 cm/nsec. With 3 GHz clock speed the electric signal travels travels roughly 50 mm in one clock cycle. Largest microchips are 30 mm across. You can't double the dimensions without dealing with the signal lag. Delivering the clock signal to every part of the chip in sync is already a problem. Modern microchips use lots of extra circuitry just to deliver the clock signal properly.
- codemusings 8y ago
  Thank you for your answer. Very interesting. I was vaguely aware of how clock cycles work but the signal lag problem didn't even occur to me.
  - veritas3241 8y ago
    I highly recommend Code by Charles Petzold. Personally, it helped me to have a more intuitive understanding of clock cycles and the underlying architecture of computers. https://www.goodreads.com/book/show/44882.Code https://www.goodreads.com/book/show/44882.Code
- vinn124 8y ago
  the quality and preciseness of this answer is why i read hn every day.
- slivym 8y ago
  Whilst it's true that modern chips have problems with routing clocks, that's not really a limiting factor in chip size. You split the design into clock regions and have clock crossing logic. There's obvious ways this happens - multi-core designs have different clocks for different cores for example. That's not really the limiting factor for chip size.
  - Nokinside 8y ago
st26 8y ago
Aside from the other reasons provided, there's also something called the reticle limit. The manufacturing process will have a maximum die size, due to the finite size of the optics used to expose the photoresist.
dragontamer 8y ago
> Can someone explaing why it's important to increase the density instead of increasing the size of a CPU? * Yields: silicon wafers have regular manufacturing errors. A bigger die means more failed CPUs, grossly increasing prices. Smaller dies isolate those errors better, leading to better yields. Lets say there are around 20-errors per wafer. 100-chips per wafer would result in ~80is to 85ish successful chips per batch. If you shrunk the die so that you had 500-chips per wafer, then you have 480-chips after manufacturing (20-defects). Wafers are a constant size. Errors are relatively constant as well. You can't change those numbers. * Power: Smaller feature sizes use less power. Smaller capacitance, so the signals travel faster and generally speaking the design can be clocked higher.
PaulHoule 8y ago
Cost too. Many costs scale with die area, so a smaller chip has a cost advantage over a big chip all things considered.

dracyr 8y ago

It is basically an issue with the thermal capacity of the chip, larger size means more heat.

snuxoll 8y ago
This right here is the big one, to be honest. Yes, clocks, latency between parts of the die, etc are all problems - but they can be worked around with some effort. Thermals and also power delivery are huge problems with large chips, just compare the massive 471 mm2 die of the GP102 (1080 Ti/Titan X) to the 150 mm2 die of the Coffee Lake hexacore chips. GP102 can draw 250-300W depending on boost clock, the Core i7-8700K can also draw upwards of 200W depending on how high you push the clocks and vCore (to keep said clocks stable). There's a reason why board-partner GPU's always have huge coolers attached to them, and why people pushing CPU clocks are often using at least a giant air cooler like the Hyper 212 EVO or an AIO liquid cooler with a 240mm+ radiator. Hell, let's skip thermals and just talk electricity - getting 200W+ of stable power to the cores on these dies is no easy task as-is, that's why you have people like buildzoid doing reviews of power delivery on motherboards and GPU boards to see if VRM's are going to blow up trying to power your expensive hardware if you're overclocking (or sometimes even if you aren't). All in all, we have thermal and power scaling issues at current chip sizes - making them bigger isn't particularly feasible unless everybody is going to start installing 360mm radiators in their system and even that might not be enough depending on clock speeds and the vCore required to maintain them.
- dogma1138 8y ago
  8700K pushes 130W at 5ghz all Core OC under full AVX load without offset even uner LN you won’t get 200W from a 8700K.

dizzystar 8y ago

I asked someone who worked on chips a similar question. The density helps connecting the parts. If the nodes aren't near each other, they have to move through other nodes to get from one to the other, and that process is "slow" in the world of chips. I guess it's like trying to get from LA to SF. You could get to SF of you 10x'd the size of earth, but it would still more than 10x as long despite having the same connections because you'd need to stop for some extra connections to even make it.

Const-me 8y ago

One reason is cost. Large size means there’re fewer chips produced per wafer, which means every single chip will cost more, proportionally to the area of a single chip. Another reason is yield. Defects are inevitable. Their probability per unit of area is roughly constant, i.e. it doesn’t depend on the area of a single chip. Therefore, the probability of one or more defects on a single chip is proportional to the exponent of the chip area. With larger chips, that exponent grows very quickly.

heavenlyblue 8y ago
You can always separate the chip into smaller cores and disable the ones that don't work.
- Const-me 8y ago
  The tactics works well for GPUs. But for CPUs, you only can do that sometimes, not always. Cores only make about half of the area. If the error is not in a core but in e.g. RAM controller or IO controller, you have to throw away the complete chip.

baybal2 8y ago

>Can someone explaing why it's important to increase the density instead of increasing the size of a CPU? If you compare semiconductors to crops, this determines how much bucks you get from an acre of silicon wafer.

jeremejevs 8y ago
I do believe that the savings from getting more dies out of a wafer are non-negligible (wafers themselves are somewhat cheap, but the equipment they're wearing out with each pass - not so much), but my guess is that they aren't the main driver behind the process shrinking.

Nokinside 8y ago

Power, heat and the speed of electrical signal. Power use increases quadratically with voltage. You want small transistors to keep the voltage and power use from getting out of hand. You also need to increase voltage if you want to increase clock speed. Electric signal travels in a conductor roughly 15 cm/nsec. With 3 GHz clock speed the electric signal travels travels roughly 50 mm in one clock cycle. Largest microchips are 30 mm across. You can't double the dimensions without dealing with the signal lag. Delivering the clock signal to every part of the chip in sync is already a problem. Modern microchips use lots of extra circuitry just to deliver the clock signal properly.

codemusings 8y ago
Thank you for your answer. Very interesting. I was vaguely aware of how clock cycles work but the signal lag problem didn't even occur to me.
- veritas3241 8y ago
  I highly recommend Code by Charles Petzold. Personally, it helped me to have a more intuitive understanding of clock cycles and the underlying architecture of computers. https://www.goodreads.com/book/show/44882.Code https://www.goodreads.com/book/show/44882.Code
vinn124 8y ago
the quality and preciseness of this answer is why i read hn every day.
slivym 8y ago
Whilst it's true that modern chips have problems with routing clocks, that's not really a limiting factor in chip size. You split the design into clock regions and have clock crossing logic. There's obvious ways this happens - multi-core designs have different clocks for different cores for example. That's not really the limiting factor for chip size.
- Nokinside 8y ago

st26 8y ago

Aside from the other reasons provided, there's also something called the reticle limit. The manufacturing process will have a maximum die size, due to the finite size of the optics used to expose the photoresist.

dragontamer 8y ago

> Can someone explaing why it's important to increase the density instead of increasing the size of a CPU? * Yields: silicon wafers have regular manufacturing errors. A bigger die means more failed CPUs, grossly increasing prices. Smaller dies isolate those errors better, leading to better yields. Lets say there are around 20-errors per wafer. 100-chips per wafer would result in ~80is to 85ish successful chips per batch. If you shrunk the die so that you had 500-chips per wafer, then you have 480-chips after manufacturing (20-defects). Wafers are a constant size. Errors are relatively constant as well. You can't change those numbers. * Power: Smaller feature sizes use less power. Smaller capacitance, so the signals travel faster and generally speaking the design can be clocked higher.

PaulHoule 8y ago

Cost too. Many costs scale with die area, so a smaller chip has a cost advantage over a big chip all things considered.