4 ms·
maybe add more bits of ECC?
by brokensegue 9y ago
maybe add more bits of ECC?
- kps 9y agoOr indeed any bits of ECC. The fact that Intel omits or disables it on most CPUs is shameful.
- dboreham 9y agoThere's ECC inside the chips.
- Symmetry 9y agoThe internal caches have ECC but rowhammer targets the DIMMs. ECC DIMMs would solve the issue but Intel, for market segmentation reasons, fuses off the ability to handle ECC memory in consumer chips.
- baq 9y agoECC doesn't protect against rowhammer though. It makes it more difficult but not impossible.
- Dylan16807 9y agoIf you shut down whatever is triggering errors instead of completely ignoring them, the difficulty level is pretty close to "impossible".
- brokensegue 9y agoone bit of ECC isn't sufficient...
- kps 9y agoBest kind of correct… but modern wide memory controllers turned (9,8), which only detects one error, into (72,64), which is SECDED, “for free”.
- brokensegue 9y agothat is still not sufficient