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The zipcpu blog posts never ceases to amaze me, the content is so good. As a sw developer who plays around in verilog on my free time, the posts are extremely h
by kbeckmann 9y ago
The zipcpu blog posts never ceases to amaze me, the content is so good. As a sw developer who plays around in verilog on my free time, the posts are extremely helpful to me. I just want to tip my hat to the author(s?), thanks!
- zipcpu 9y agoThanks for the complement! I'm actually the only one who has posted on the site.
- davemp 9y agoHe also hangs out and is pretty helpful on some fpga related IRCs
- WillSlim95 9y agoHi what are some of the FPGA related IRCs?
- zipcpu 9y agoFreenode has several FPGA related channels. Among them are ##fpga, ##verilog, and ##vhdl.
- dclowd9901 9y agoSince we're getting meta on the post, I find the tone to be haughty and demeaning. "I’ll spare him the embarrassment of being named, or of linking to his project. Instead, I’m just going to call him a student. (No, I’m not a professor.) This 'student'..." Why was this needed? What purpose did it serve the greater article except for the author to espouse their own superiority? This kind of stuff needs to get the hell out of engineering. It turns away potentially many brilliant people that could join the field but fear the rejection by peers.
- bendbro 9y agoWould you still want it gone if it caused a net gain in proficient engineers, but a net loss in total engineers?
- dclowd9901 9y agoOh, you're one of those.
- edmccard 9y ago> Would you still want it gone if it caused a net gain in proficient engineers, but a net loss in total engineers? Do you have any reason to believe that arrogance and proficiency are correlated?