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Can you write Java programs that can outperform C++ programs is the questions? That are also significantly bug free? Oh yeah, and don't GC, and either use only
by jnordwick 10y ago
Can you write Java programs that can outperform C++ programs is the questions? That are also significantly bug free? Oh yeah, and don't GC, and either use only in-house libraries or or ones you've written. Almost everything I've done is hand written just because of the very unique nature of the softish-RT and high-performance requirements. The work is very interesting, very demanding, and very fun.
- CyberDildonics 10y agoI would use ISPC and optimized memory layouts to shame whatever programs people told me couldn't be faster.
- kasey_junk 10y agoI've interacted with ISPC based trading cores, they provide some value but the trading context is frequently not that parallelisable and often the things that ISPC is good at are even better done by custom hardware. The real challenge is integrating with other systems and changing the code as new requirements come to market, so the kind of work being described is to make the some Java component that must be communicated with fast enough to not have to be rewritten entirely. In any case, if you have a mix of Java/C++/HPC, can prove it, and enjoy it, there are lots of finance jobs that pay in that relm.
- jnordwick 10y agoOne thing I've really wanted to try is a FPGA on a socket. I've seen FPGAs that fit in CPU sockets before and used the QPI link to communicate to the other processor and anything else on the ring. Since you don't need to pay the PCI bus latency costs you could potentially do some pretty wild things such as talk to the NIC directly and keep your book on the FPGA and pushed into the LL cache. You can even speak to the LL cache directly, make DMA calls. Talk to the memory controller. Etc. I've tried some GPU stuff for options and looking down futures curve, but the cost of going off core is prohibitive in most cases.
- kasey_junk 10y agoI assume you mean wouldn't pay the PCI bus costs. But yeah that would be cool. I've never had a chance to work on in router asic/FPGA and I'd like to try that some time.