4 ms·
The lattice constant for silicon is about half a nanometer, right? So that means that this new "gate" is only about 10 silicon atoms across? That's a very impr
by brian-armstrong 10y ago
The lattice constant for silicon is about half a nanometer, right? So that means that this new "gate" is only about 10 silicon atoms across?
That's a very impressive feat. It's hard to imagine CMOS continues scaling down beyond that point.
- amelius 10y agoIt makes me wonder why we really need such a huge lattice (the silicon bulk) really. Can't we somehow deposit small pieces of lattice in places where a transistor is needed?
- lmm 10y agoWhat would the remainder be? At this scale there's no such thing as homogeneity, your options are crystal lattices or a lumpy mess of atoms.
- amelius 10y agoCould be anything, as long as it is insulating. Advantages would be: reduced noise coupling between devices, and it would open the possibility to make multiple layers of transistors.
- 6nf 10y agoThere are alternatives but they are difficult (expensive) to work with and not yet required so we keep using silicon for the 5nm node
- hyperpallium 10y agountil peak silicon EDIT the analogy with peak oil is not literal, but that just as uneconomical sources of oil (and of energy) became more economical when the price went up, the parent's "alternatives" will become more economical when present silicon technology gets more expensive (due to the lattice size for example, as discussed). Just as with oil, it doesn't necessarily mean we'll give up silicon. Though we might.
- jrockway 10y ago28% of Earth's mass is silicon, so I'm not too worried.
- Tuna-Fish 10y agoThe problem with this is lack of uniformity. You can have a single perfect crystal lattice that is perfectly uniform over 5 billion transistors, but you cannot deposit small pieces of lattice in 5 billion places without at least one being deformed.
- QuantumRoar 10y agoYes. And another problem is that there's such a thing as electron confinement. It's the same effect as in the "particle in a box" solution of the Schrödinger equation where the particle's probability is zero next to an infinitely high potential. The gate oxide is a very high potential for an electron and therefore the actual current flows close to the center of the wire. So instead of a diameter of 10 silicon atoms, you now have something like 5 or so where the current flows. Imagine that you place a single atom wrongly in the center of your nanowire. Now you have a scattering target exactly where your first mode (the most populated one) has its maximum. It's effectively like putting a block of concrete on a one-way street. There's no way the electrons could go around the defect. It could completely stop your nanowire from working or at least deteriorate its properties severely. That's why imec tries to use 3 nanowires per transistor. It'd be quite the show stopper if some of your transistors wouldn't work at all.