4 ms·
Cache coherency primer (2014)
- bluecalm 10y agoI don't know almost anything about hardware but that was very well written and easy to follow. A pleasure to read.
- camelspade 10y agoIf you are more interested, Appendix C of "Is Parallel Programming Hard, And, If So, What Can You Do About It?" by Paul McKenney (http://kernel.org/pub/linux/kernel/people/paulmck/perfbook/perfbook.html http://kernel.org/pub/linux/kernel/people/paulmck/perfbook/p...) provides a very detailed description as well. It really helped improve my understanding of how memory barriers and atomics work
- stplsd 10y agoThis is also a very good read: https://lagunita.stanford.edu/c4x/Engineering/CS316/asset/A_Primer_on_Memory_Consistency_and_Coherence.pdf https://lagunita.stanford.edu/c4x/Engineering/CS316/asset/A_...
- camelspade 10y agoThanks! :) Gonna add this to the list of books I need to read.
- swah 10y agoIt was very helpful for me as well - I saw cache optimization mentioned in these C++ gamedev talks but wasn't quite grasping the issues.
- bluetomcat 10y agoThe moral of the story for software developers is to be aware of false sharing and cache line bouncing when writing multithreaded code. Seemingly innocent code like this will most likely cause completely unnecessary inter-core traffic (assuming that the compiler has laid out a and b adjacently, and they both fall within the boundaries of a single cache line): unsigned a, b; void thread_a(void) { for (;;) a++; } void thread_b(void) { for (;;) b++; }