5 ms·

Here's to the systems programmers – Writing Hello World on a home brew CPU

112 points by jackqu7 10y ago

zero_iq 10y ago
Fantastic achievement. Would love to know some more details about the project and hardware design.
- coldpie 10y ago
  Agreed, this is super cool. I've read the book "Code" a few times, so I understand a lot of this stuff in theory, but I sure don't understand the practice. Awesome work.
  - vishvananda 10y ago
    I read code a couple of times and did Nand2Tetris. I also found the edX 6.004 mit course[1] to be extremely useful to fill in some of the gaps. I'm waiting for part three to start in a couple of weeks. [1]: https://www.edx.org/course/computation-structures-part-1-digital-mitx-6-004-1x2 https://www.edx.org/course/computation-structures-part-1-dig...
blastrat 10y ago
I really wish he'd document even the barest scraps of the CPU architecture. Is it microcoded? There's 7400 series like 7402 or 7473, and there's 7400 series like 74154, 74181, etc. "hey kid, I built one of these too, back in the day, and it was damn hard and time consuming, but oh a labor of love. I had no internet, nor any schooling. I read articles in Popular Electronics and I read the TI 7400 series databook. Then I reread them. Then I reread them." Yes, in fact it was snowing, uphill, and I in fact had no shoes!
- extrapickles 10y ago
  Judging from the small number of chips in the photograph, they used the higher integration 74 series logic rather than the lower level flip-flop/NAND type.
- vvanders 10y ago
  That reminds me of my favorite project of all time, the 7400 FPGA: http://blog.notdot.net/2012/10/Build-your-own-FPGA http://blog.notdot.net/2012/10/Build-your-own-FPGA
  - nickpsecurity 10y ago
    Never saw that one. Wild stuff. Here's the latest on open FPGA's: http://www.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-43.pdf http://www.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-43...
- jackqu7 10y ago
  Completely agree, this was just the first foray into documenting this project and I wanted to make it less heavy on the details of the hardware to reach a wider audience. I'm definitely going to put up a more technical post and the sources/schematics as soon as I can. To answer your questions, it's hard wired with the control logic made out of the simpler chips (7400, 7408, 7432 etc) but the rest of the system does contain more complex chips, the 74181 ALUs being the largest.
amelius 10y ago
Does it do pipelining, branch prediction and (hyper)threading? How is its memory hierarchy (cache levels) organized? Does it support a privileged mode? Does it support hardware page faults? Did you implement floating-point operations? > In order to be able to program it at all, I wrote a very simple compiler (strictly speaking it’s actually an assembler) Does that compiler/assembler run on your hardware?
- cdkersey 10y ago
  In a word: no. Processors this simple don't implement any of the features you mention, including multi-level memory hierarchies, and I doubt the author had any inclination to make the assembler self-hosting.
  - Someone 10y ago
    I'm not saying one should expect or demand it in a project like this, but minimalistic pipelining should be doable; both the 6502 (http://www.6502.org/users/andre/65k/arch.html#pipelining http://www.6502.org/users/andre/65k/arch.html#pipelining) and (IIRC) the 8080 started fetching the next instruction before finishing execution of the current one, where possible.
    - to3m 10y ago
      Do you have an example of a case where this provided a performance benefit to 6502 code?
- placeybordeaux 10y ago
  Why should it?
ntumlin 10y ago
Any idea where I could go about learning to do this myself? A few google searches mainly led me to things saying it was impossible.
- Luc 10y ago
  I think you'll like this then: http://www.nand2tetris.org/ http://www.nand2tetris.org/
  - dang 10y ago
    It's a wonderful, in fact an astonishing course. I hope that when they come out with part 2, it really does go all the way to Tetris. The "nand" bit is a slight fudge (they actually start you off with both nand and a flip-flop, which is still amazing), but we can grant them a bit of poetic license on that. But not on the Tetris!
    - nickpsecurity 10y ago
      I wonder if this had something to do with someone I countered a day or two ago thinking all you needed was a NAND gate to do anything. I said you need memory and some other things for most hardware. Maybe that commenter got the idea from this project's name...
      - andars 10y ago
        Note that you can in fact create memory with NAND gates. See https://en.wikipedia.org/wiki/Flip-flop_(electronics)#SR_NAND_latch https://en.wikipedia.org/wiki/Flip-flop_(electronics)#SR_NAN...
        dang 10y ago
        Yes, and in one of their Coursera videos the nand2tetris guys sketch out how this works. But I wish they'd have included it in the course itself. Maybe it would have needed an extra chapter, but for those of us who never studied it before it's really cool stuff.
nickpsecurity 10y ago
It sounds cool and interesting but has almost no detail. Come on, Jack! Give us some details, RTL, code, board schematics, whatever. @ All This is how you do homebrew CPU's and presentation best: http://www.homebrewcpu.com/ http://www.homebrewcpu.com/ Links to others for anyone wanting to learn about this stuff: http://www.homebrewcpu.com/links.htm http://www.homebrewcpu.com/links.htm
- jackqu7 10y ago
  Magic 1 was what inspired me to start the project, I continue to be in awe at the ambition of Bill's project. Watch this space for a more technically focused post.
  - nickpsecurity 10y ago
    It awed me as well. Plus, the performance and such gave me inspiration that homebrew might be an answer to non-subverted computers post-Snowden. At least, for the bootstrapping phase of other computers, SCM/builds, or key storage. Only thing was that a HW guy told me the TTL chips he used might be hard to come by. I looked them up and had trouble finding them. So, rather than cloned, the next Magic 1 should be ported use components currently available... preferably 10 year horizon. Also, ideally something fabbed at 0.35 microns or above for visual inspection. Plus realism, as we're practically cheating if you're using deep submicron for "hand-built, old-school" systems. What kind of primitive components are you using or found consistently available?
jhallenworld 10y ago
I wrote Hello World for my relay computer- only 27 lines (uses self modified code, same as Jack!): http://relaysbc.sourceforge.net/example-code.html http://relaysbc.sourceforge.net/example-code.html
outworlder 10y ago
> Built from simple logic chips, it runs at a blistering 4MHz, has 32kb of RAM I know that the author was being sarcastic, but really, 4MHz with 32kb of RAM is like state of the art 80's technology. The fact that we are even able to get to this point with protoboards and discrete off-the-shelf logic chips is impressive. I mean, I learned how to program back in 1988 in a computer not much more powerful than that.

112 points by jackqu7 10y ago

zero_iq 10y ago

Fantastic achievement. Would love to know some more details about the project and hardware design.

coldpie 10y ago
Agreed, this is super cool. I've read the book "Code" a few times, so I understand a lot of this stuff in theory, but I sure don't understand the practice. Awesome work.
- vishvananda 10y ago
  I read code a couple of times and did Nand2Tetris. I also found the edX 6.004 mit course[1] to be extremely useful to fill in some of the gaps. I'm waiting for part three to start in a couple of weeks. [1]: https://www.edx.org/course/computation-structures-part-1-digital-mitx-6-004-1x2 https://www.edx.org/course/computation-structures-part-1-dig...

blastrat 10y ago

I really wish he'd document even the barest scraps of the CPU architecture. Is it microcoded? There's 7400 series like 7402 or 7473, and there's 7400 series like 74154, 74181, etc. "hey kid, I built one of these too, back in the day, and it was damn hard and time consuming, but oh a labor of love. I had no internet, nor any schooling. I read articles in Popular Electronics and I read the TI 7400 series databook. Then I reread them. Then I reread them." Yes, in fact it was snowing, uphill, and I in fact had no shoes!

extrapickles 10y ago
Judging from the small number of chips in the photograph, they used the higher integration 74 series logic rather than the lower level flip-flop/NAND type.
vvanders 10y ago
That reminds me of my favorite project of all time, the 7400 FPGA: http://blog.notdot.net/2012/10/Build-your-own-FPGA http://blog.notdot.net/2012/10/Build-your-own-FPGA
- nickpsecurity 10y ago
  Never saw that one. Wild stuff. Here's the latest on open FPGA's: http://www.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-43.pdf http://www.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-43...
jackqu7 10y ago
Completely agree, this was just the first foray into documenting this project and I wanted to make it less heavy on the details of the hardware to reach a wider audience. I'm definitely going to put up a more technical post and the sources/schematics as soon as I can. To answer your questions, it's hard wired with the control logic made out of the simpler chips (7400, 7408, 7432 etc) but the rest of the system does contain more complex chips, the 74181 ALUs being the largest.

amelius 10y ago

Does it do pipelining, branch prediction and (hyper)threading? How is its memory hierarchy (cache levels) organized? Does it support a privileged mode? Does it support hardware page faults? Did you implement floating-point operations? > In order to be able to program it at all, I wrote a very simple compiler (strictly speaking it’s actually an assembler) Does that compiler/assembler run on your hardware?

cdkersey 10y ago
In a word: no. Processors this simple don't implement any of the features you mention, including multi-level memory hierarchies, and I doubt the author had any inclination to make the assembler self-hosting.
- Someone 10y ago
  I'm not saying one should expect or demand it in a project like this, but minimalistic pipelining should be doable; both the 6502 (http://www.6502.org/users/andre/65k/arch.html#pipelining http://www.6502.org/users/andre/65k/arch.html#pipelining) and (IIRC) the 8080 started fetching the next instruction before finishing execution of the current one, where possible.
  - to3m 10y ago
    Do you have an example of a case where this provided a performance benefit to 6502 code?
placeybordeaux 10y ago
Why should it?

ntumlin 10y ago

Any idea where I could go about learning to do this myself? A few google searches mainly led me to things saying it was impossible.

Luc 10y ago
I think you'll like this then: http://www.nand2tetris.org/ http://www.nand2tetris.org/
- dang 10y ago
  It's a wonderful, in fact an astonishing course. I hope that when they come out with part 2, it really does go all the way to Tetris. The "nand" bit is a slight fudge (they actually start you off with both nand and a flip-flop, which is still amazing), but we can grant them a bit of poetic license on that. But not on the Tetris!
  - nickpsecurity 10y ago
    I wonder if this had something to do with someone I countered a day or two ago thinking all you needed was a NAND gate to do anything. I said you need memory and some other things for most hardware. Maybe that commenter got the idea from this project's name...
    - andars 10y ago
      Note that you can in fact create memory with NAND gates. See https://en.wikipedia.org/wiki/Flip-flop_(electronics)#SR_NAND_latch https://en.wikipedia.org/wiki/Flip-flop_(electronics)#SR_NAN...
      - dang 10y ago
        Yes, and in one of their Coursera videos the nand2tetris guys sketch out how this works. But I wish they'd have included it in the course itself. Maybe it would have needed an extra chapter, but for those of us who never studied it before it's really cool stuff.

nickpsecurity 10y ago

It sounds cool and interesting but has almost no detail. Come on, Jack! Give us some details, RTL, code, board schematics, whatever. @ All This is how you do homebrew CPU's and presentation best: http://www.homebrewcpu.com/ http://www.homebrewcpu.com/ Links to others for anyone wanting to learn about this stuff: http://www.homebrewcpu.com/links.htm http://www.homebrewcpu.com/links.htm

jackqu7 10y ago
Magic 1 was what inspired me to start the project, I continue to be in awe at the ambition of Bill's project. Watch this space for a more technically focused post.
- nickpsecurity 10y ago
  It awed me as well. Plus, the performance and such gave me inspiration that homebrew might be an answer to non-subverted computers post-Snowden. At least, for the bootstrapping phase of other computers, SCM/builds, or key storage. Only thing was that a HW guy told me the TTL chips he used might be hard to come by. I looked them up and had trouble finding them. So, rather than cloned, the next Magic 1 should be ported use components currently available... preferably 10 year horizon. Also, ideally something fabbed at 0.35 microns or above for visual inspection. Plus realism, as we're practically cheating if you're using deep submicron for "hand-built, old-school" systems. What kind of primitive components are you using or found consistently available?

jhallenworld 10y ago

I wrote Hello World for my relay computer- only 27 lines (uses self modified code, same as Jack!): http://relaysbc.sourceforge.net/example-code.html http://relaysbc.sourceforge.net/example-code.html

outworlder 10y ago

> Built from simple logic chips, it runs at a blistering 4MHz, has 32kb of RAM I know that the author was being sarcastic, but really, 4MHz with 32kb of RAM is like state of the art 80's technology. The fact that we are even able to get to this point with protoboards and discrete off-the-shelf logic chips is impressive. I mean, I learned how to program back in 1988 in a computer not much more powerful than that.