14 ms·
The chips are down for Moore’s law
- alexnewman 11y ago"Top-of-the-line microprocessors currently have circuit features that are around 14 nanometres across, smaller than most viruses" Yea this is not true. The 14nm or 11nm stuff from chip manufactures is more of a marketing thing. It's much more complicated than that.
- bbtn 11y agoPeople think it is transistor size that is 14 nm, which is not. It is metal pitch on high density memory chips that have repetitive patterns all over the chip. That sentence is not wrong. It looks well stated.
- dbcooper 11y ago14nm is supposed to refer to the gate length (which may be larger than the node name). The gate pitch of Intel's 14nm CPU process node is more like 70nm. [1] [1] http://www.anandtech.com/show/8367/intels-14nm-technology-in-detail http://www.anandtech.com/show/8367/intels-14nm-technology-in...
- creshal 11y agoI think the last process where process name = gate length was 90nm. Ever since the naming scheme was more a historic artefact than anything else.
- gnarbarian 11y agoI am excited to see if this evolutionary bottleneck will take us beyond the von neumann architecture. The article implies we will get even more specialized hardware that will speed up common categories of algorithms like gpus asics and FPGAs have been used. I wonder what kinds of performance gains could be had from a merge sort asic for example. I think the real interesting thing will be if new architectures beyond von neumann will allow us to think outside the box and break out into new algorithmic territory that is not obvious from our current perspective. It's very hard for us to throw away our toolchain towers of Babel but I think the departure has already begun when you look at bitcoin mining and gpgpu programming.
- creshal 11y ago> The article implies we will get even more specialized hardware that will speed up common categories of algorithms like gpus asics and FPGAs have been used. Which is actually bad, because it entrenches existing solutions and makes it harder to switch to new, better algorithms. Just look at cryptography: Now that AES is hardware accelerated in desktop CPUs, ChaCha has been bumped down to "that one algorithm for mobile users with shitty CPUs" with little to no chance of gaining significant traction on other markets until Intel decides to add hardware acceleration for it, too.
- gnarbarian 11y agoSure but OpenGL/OpenCL is a good counter example. We have an open standard tailored to a specialized style of architecture that is supported across vendors, competitive with closed/proprietary alternatives and beats the hell out of anything we could run on a CPU.
- creshal 11y agoOpenGL, really? The graphics API that is to terribly unsuited to modern hardware that it spawned several replacement APIs (Apple Metal, Khronos Vulkan, DirectX 12, …) and that has been more in the way of than helping programmers for at least a decade before? OpenGL is the perfect caution tale on what not to do when trying to make a hardware acceleration API.
- gnarbarian 11y agoVulkan is next. Opengl dominated for quite a while. 10 years? after it beat glide. The hardware has changed enough to warrant a new standard which is where the gpgpu language explosion is coming from.
- douche 11y agoOpenGL dominated? Not anywhere where people had better alternatives. Windows/XBox had DirectX, other console makers had their own proprietary libraries.
- legulere 11y ago> “So far as I know, there is no example of anything like this in any other industry, where every manufacturer and supplier gets together and figures out what they are going to do.” In effect, it converted Moore's law from an empirical observation into a self-fulfilling prophecy: new chips followed the law because the industry made sure that they did. Probably because in every other industry this would have been seen as anti-competitive behaviour.
- coldtea 11y ago>Probably because in every other industry this would have been seen as anti-competitive behavior. Not really, since nobody prevented any company from coming up with even faster speeds / bigger transistor counts. The whole coordination was to push the limits. Not sure which industry would consider ... exponential improvements as "anti-competitive". More likely they would kill to be able to have them too.
- marcosdumay 11y agoWhile the GP is seeing collusion where there are only aligned incentives, you are not getting some of the point of Moore's Law. The thing is, most industries begin with a short period of super-exponential improvements, most of what happen in the lab before the products even get sold. In just a few years, the industry is mature, and further improvements happen in a much slower rate. Semiconductor industry is different. Because of economical factors, it couldn't have that super-exponential beginning, and had to slow down for decades of merely exponential growth. (It also may had the biggest rate of mature/immature efficiency we've ever seen - but that's another thing.)
- coldtea 11y ago>The thing is, most industries begin with a short period of super-exponential improvements, most of what happen in the lab before the products even get sold. Can you name any of those industries? Because most (if not all) industries and products I know, aside of IT, have none such "super-exponential" improvements at their beginnings, not even exponential ones year over year. We don't have 100x better cars than in 1950. Film cameras didn't get x better in their first years -- it was a slow and painful evolution that lasted decades to get to something like the 35mm film and standardized functionality. We don't have 10x better air-conditioning, watches, guitars, etc. The only places I can think of where that holds are things like memory, storage, CPUs, GPUs etc -- all IT related. And maybe batteries, though I doubt it.
- Aardwolf 11y ago> Top-of-the-line microprocessors currently have circuit features that are around 14 nanometres across, smaller than most viruses. Well, that gives room for improvement, a virus has quite a bit more logic inside than a single gate feature :)
- jostmey 11y agoTrue, but transistors are already smaller in size than a human synapse. But synapses don't produce so much heat, so you can stack as many as you want in 3D space without overheating, unlike silicon transistors.
- jacquesm 11y agoThere may be an interesting lesson buried here. What if there is efficiency to be gained from drastically reducing the clock rate of processors while at the same time increasing the number of interconnects? A bit like an ultra low power version of the connection machines.
- pjc50 11y agoYou'd need a sensible way of programming it. Perhaps when 'deep learning' stabilizes a bit there will be commodity neural network chips (there are a few at the moment e.g. http://www.cognimem.com/products/chips-and-modules/CM1K-Chip/ http://www.cognimem.com/products/chips-and-modules/CM1K-Chip...). It's already possible to tweak the process parameters to produce slow-but-efficient chips. I recently saw http://www.ti.com/lsds/ti/microcontrollers_16-bit_32-bit/msp/ultra-low_power/msp430l09x_low_voltage/overview.page http://www.ti.com/lsds/ti/microcontrollers_16-bit_32-bit/msp... : 45 microamps/MHz up to 4MHz, runs down to 0.9V. Pair with a suitably low self-discharge battery and it'll run for a decade.
- jostmey 11y agoThere is more than one way to skin a cat. Somehow, the heat problem needs to be solved. Perhaps what would help is to store energy locally, like our brain. Each cell has its own store of ATP, so a constant feed of ionic current is not needed.
- hga 11y agoNone of this was inevitable: chipmakers deliberately chose to stay on the Moore's law track. At every stage, software developers came up with applications that strained the capabilities of existing chips; consumers asked more of their devices; and manufacturers rushed to meet that demand with next-generation chips. Moore's law is stated in terms of a doubling of lowest cost transistors you can fit on a wafer, and results in massive yield gains if you shrink an existing design when moving from node to node (the "tick" in Intel's tick-tock cycle). So whatever customers want, you'll still move to the next node if the economics allow you to deliver the same at a lower cost. This is one of the things that drives game console economics, mid-life refreshes which allow delivering the same capabilities with cheaper and fewer chips (fewer decreases other manufacturing costs). The heat problem and related end of "free" speed increases is due to the failure of Dennard scaling (https://en.wikipedia.org/wiki/Dennard_scaling https://en.wikipedia.org/wiki/Dennard_scaling) after a good 30 year run. Every time the scale is halved, manufacturers need a whole new generation of ever more precise photolithography machines. Building a new fab line today requires an investment typically measured in many billions of dollars — something only a handful of companies can afford. Ignoring the far out scaling limits, this is what I would have focused on. As far as I can tell, the biggest issue right now is the skyrocketing costs of lithography due to the multiple masks required for multiple patterning (https://en.wikipedia.org/wiki/Multiple_patterning https://en.wikipedia.org/wiki/Multiple_patterning). If, and it's a big if (see Intel continuing to push out they date they plan to adopt it), when EUV lithography become practical that should change this very recent economic issue, substituting manufacturing costs in buying and running $$$ EUV machines for many fewer masks required for each design, lowering non-recurring engineering (NRE) expenses. That could return a lot of the game to what it was like for a long time, albeit with only a very few foundries being able to afford these machines. The first generation the leading company in the Netherlands is trying is pretty insane in how they generate the light, by exciting tin vapor (!), imagine the inherent contamination potential for both the focusing optics and the wafer.... One other detail: to the extent a lot of companies start focusing on the economic ~22nm or so node that's just before costs skyrocket, we may be seeing some serious economies of scale as people focus on aspects other than the design shrink. Sure, you'd like smaller nodes, especially for lowest power applications, note how Intel is leading with mobile SKUs for it's newest smaller node chips, but that node is perfectly fine for a whole lot of things. Another economic factor to focus on, not everyone is an Intel, nVidia, Apple etc. that needs cutting edge nodes.
- tempodox 11y agoI had the idea to go 3D in chip design thirty years ago, but wasn't in a position to trigger any research or experiments. I'm curious to see how this development will turn out.
- Symmetry 11y agoI really ought to do a blog post on the math behind this but it's not really a simple matter of power density because drive currents have traditionally shrunk along with the area and hence capacitance of transistors. For a long time people didn't reduce voltage to achieve classical Dennard Scaling[1] because back in the day nobody really cared about power but you could always go back to scaling that if you wanted. I suppose that the reason it looms so large in our heads is that Intel was having problems with power on the Pentium IV right as things were starting to change around 90nm. Some things that make increasing performance with feature size more difficult recently are that transistors spend lots of time velocity saturated, there's increased leakage current, and the capacitance of wires has come exceed transistor capacitance.
- clickok 11y agoPlease do. I understand why chips can't continue to improve following Moore's law from some fairly high level perspectives, but I haven't seen anything that provides more detail than the typical pop-science articles but without requiring me to crack open a text on condensed matter physics.
- zekevermillion 11y agoWhere do chipmakers go from here? When the best consumer chips on the market add very little to the cost of a machine, then you have to come up with another way to win market share that isn't just based on speed claims. I'm sure there will be more spend on marketing fluff, attempts to brand slightly different products for different segments and price discriminate between them -- enterprise, gaming, mobile, IoT. But I also wonder if we will see more pernicious behavior, in chipmakers keying chips to specific applications through DRM, so they can sell locked appliances with software built in.
- crimsonalucard 11y agoI think the upper bound of Moore's law foreshadows another impending boundary: There is a fundamental boundary on all technological progress.
- robotcookies 11y ago> Moore's law, the principle that has powered the information-technology revolution since the 1960s, is nearing its end. I don't understand why people keep saying Moore's law will end soon... as if it's a forecast. I just checked an online site for cpus and the fastest one available was at 3.7 GHZ. It was maybe 3.2 GHZ two years ago. In 2001, I bought a computer that ran at 1 GHZ. That's 15 years ago! Moore's law is usually defined as doubling every 18 months. Even if we stretched it to every 24 months, we should be at well over 100 GHZ. Even if we account for the 4 cores, it's still not happening. What am I missing here? It seems like Moore's law has been dead for years. Please don't tell me about experimental cpus that are faster or theoretical processors. Moore's law is defined as speed increases while the price stays the same. What matters is what cpus are available to consumers.
- ajross 11y agoMoore's Law properly expressed is about transistor density and not switching speed. Clock rates have been static over the last decade, but register widths have climbed by a factor of 8 and we're now packing a dozen or more cores on a die that used to hold one.
- T-A 11y ago> Moore's law is defined as speed increases while the price stays the same. No. As stated in the second paragraph of the article, Moore's law states that the number of transistors on a microprocessor chip will double every two years or so.
- douche 11y agoPentium 4s ten years ago could hit around 4 GHz. Running any faster than that runs into some issues with the basic physics. Some good explanations here[1]. Now we're into the era of "well, that's as fast as we can go on one core, let's chuck more cores at it". Except writing parallel code is hard, and parallelism doesn't help if what you're doing is effectively single-threaded. Great for mass processing of vertex data in a 3D mesh The next frontier was faster caches and memory, so we could keep those processors burning at max speed more of the time, with fewer idles waiting on input or output. Then we needed faster main storage, so we could spend less time fetching data from slow spinning disks into our limited, fast memory. Voila, SSDs. Now we're down to fast CPUs, fast caches, fast memory, fast disks, and slow networking. Someday we'll get wide-spread fiber deployed, and that gate becomes less of a problem. Through all of this, the effective speed of computers has continued to rise, although the top-line limit of CPU Hz hasn't changed much. [1] http://electronics.stackexchange.com/questions/122050/what-limits-cpu-speed http://electronics.stackexchange.com/questions/122050/what-l...