5 ms·

This seems like a silly title. I interpret it as 'How the CPU, when packaged with a bunch of other stuff, is displacing the CPU.' Or am I missing something?

rwmj 11y ago
You're not missing anything -- the article is dumb. Of course we're eventually going to integrate everything, for the same reason that no one uses separate interrupt controllers or separate Northbridges. We have too many transistors we don't know what to do with. Edit: I think the interesting question is what won't be integrated? RAM and Flash because they use different processes. GPU? Intel and ARM integrate it, but there is a large company selling GPUs.
- digi_owl 11y ago
  Makes me wonder if we will see a return of backplanes.
  - luckydude 11y ago
    Unless things have really changed, there is a significant performance hit for going off chip. Rather than backplanes, I'd predict that they figure out how to put ram right on the chip. I'm pretty sure embedded CPUs already do that.
    - pmorici 11y ago
      PoP "Package on Package" which puts the memory directly on top of the CPU has been around for a while. https://en.wikipedia.org/wiki/Package_on_package https://en.wikipedia.org/wiki/Package_on_package
      - joezydeco 11y ago
        PoP is nice, but what's really hot is SRAM right on the die. I've been playing with a Renesas part (RZ/A1H) that has 10MiB snuggled up to the A9 core. Doesn't solve everything, but when your app heap and stack are in there it's a great jump in performance for the price. It can also mmap external QSPI flash, you can create a system with no external SDRAM at all if you wanted.
        nickpsecurity 11y ago
        Scratchpads have all kinds of benefits plus are easier to implement than caches. Unfortunately, the market rejects them mostly in Intel's sector. So, we have things like IBM using a ton of onboard cache in high-end chips that's not quite SRAM speed. Worse is better. (shrugs)
- raverbashing 11y ago
  Also I would like to know how much die space is wasted on IBM PC backwards compatibility crap in Intel systems (think A20, cascading interrupt controllers, 8086 support, legacy boot, etc)
  - bluetomcat 11y ago
    Not much, I guess. The original 8086 had only around 30000 transistors. The die of a modern quad-core Intel chip accommodates more than a billion transistors, about half of which are dedicated to the GPU and maybe around 10% are taken by a single core. That would roughly translate to 100 million transistors per core (including their L1 and L2 caches), so the footprint of the legacy cruft should be negligible.
  - throwaway2048 11y ago
    An intel 8088 processor had a 22mm^2 die size at a 3000nm process node size. A modern x86 processor has a ~200mm^2 die size at a 14nm node size, a die size that is 10x larger with features 200x smaller. Even if a modern x86 chip had to put an entire 8088 on die for legacy compatability (which it definitely would not need to) we are talking less than 0.1% of the die space being taken up by legacy features. The idea that x86 is somehow doomed to be inefficent because of legacy baggage is quite simply massively overblown.
    - rwmj 11y ago
      While you're right that it's not a huge deal, architectural issues are not solved by putting "an entire 8088 on die for legacy compatability" unless you'd want to run the old software at very low speed. Intel solved it with lots of R&D. Their solution involves a layer that translates x86 instructions to native ops[1], plus many little hacks and improvements. [1] http://www.realworldtech.com/nehalem/5/ http://www.realworldtech.com/nehalem/5/

rwmj 11y ago

You're not missing anything -- the article is dumb. Of course we're eventually going to integrate everything, for the same reason that no one uses separate interrupt controllers or separate Northbridges. We have too many transistors we don't know what to do with. Edit: I think the interesting question is what won't be integrated? RAM and Flash because they use different processes. GPU? Intel and ARM integrate it, but there is a large company selling GPUs.

digi_owl 11y ago
Makes me wonder if we will see a return of backplanes.
- luckydude 11y ago
  Unless things have really changed, there is a significant performance hit for going off chip. Rather than backplanes, I'd predict that they figure out how to put ram right on the chip. I'm pretty sure embedded CPUs already do that.
  - pmorici 11y ago
    PoP "Package on Package" which puts the memory directly on top of the CPU has been around for a while. https://en.wikipedia.org/wiki/Package_on_package https://en.wikipedia.org/wiki/Package_on_package
    - joezydeco 11y ago
      PoP is nice, but what's really hot is SRAM right on the die. I've been playing with a Renesas part (RZ/A1H) that has 10MiB snuggled up to the A9 core. Doesn't solve everything, but when your app heap and stack are in there it's a great jump in performance for the price. It can also mmap external QSPI flash, you can create a system with no external SDRAM at all if you wanted.
      - nickpsecurity 11y ago
        Scratchpads have all kinds of benefits plus are easier to implement than caches. Unfortunately, the market rejects them mostly in Intel's sector. So, we have things like IBM using a ton of onboard cache in high-end chips that's not quite SRAM speed. Worse is better. (shrugs)
raverbashing 11y ago
Also I would like to know how much die space is wasted on IBM PC backwards compatibility crap in Intel systems (think A20, cascading interrupt controllers, 8086 support, legacy boot, etc)
- bluetomcat 11y ago
  Not much, I guess. The original 8086 had only around 30000 transistors. The die of a modern quad-core Intel chip accommodates more than a billion transistors, about half of which are dedicated to the GPU and maybe around 10% are taken by a single core. That would roughly translate to 100 million transistors per core (including their L1 and L2 caches), so the footprint of the legacy cruft should be negligible.
- throwaway2048 11y ago
  An intel 8088 processor had a 22mm^2 die size at a 3000nm process node size. A modern x86 processor has a ~200mm^2 die size at a 14nm node size, a die size that is 10x larger with features 200x smaller. Even if a modern x86 chip had to put an entire 8088 on die for legacy compatability (which it definitely would not need to) we are talking less than 0.1% of the die space being taken up by legacy features. The idea that x86 is somehow doomed to be inefficent because of legacy baggage is quite simply massively overblown.
  - rwmj 11y ago
    While you're right that it's not a huge deal, architectural issues are not solved by putting "an entire 8088 on die for legacy compatability" unless you'd want to run the old software at very low speed. Intel solved it with lots of R&D. Their solution involves a layer that translates x86 instructions to native ops[1], plus many little hacks and improvements. [1] http://www.realworldtech.com/nehalem/5/ http://www.realworldtech.com/nehalem/5/