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That's a good point, but I wonder if coming up from below with a cleaner architecture might be able to accomplish something similar. Is MIPS64 cleaner than X86,
by api 11y ago
That's a good point, but I wonder if coming up from below with a cleaner architecture might be able to accomplish something similar. Is MIPS64 cleaner than X86, and could this let them create lower power higher performance chips or manufacture equivalent performance chips at a lower cost?
http://blog.imgtec.com/mips-processors/loongson-mips64-processors-performance-barrier http://blog.imgtec.com/mips-processors/loongson-mips64-proce...
- nordsieck 11y agoThe benefit of a lack of a decode step (for arm vs x86, but I assume the analysis is roughly correct for mips) was estimated at RealWorldTech as about 5% of a core's energy. Given that the amount of energy the cores take up as a portion of the total energy budget, I doubt it would matter for high performance chips - particularly in the face of Intel's 1-2 process generation lead over everyone else. Admittedly, phone chips are a bit lower power than desktop CPUs, but they are pretty beefy these days.
- api 11y agoDunno... 5% at data center scale could make a difference in the highly competitive cloud services market where margins are already fairly small.