8 ms·
SVG Mask Artwork of the Intel 4004
- intrasight 11y agoI don't see "SVG" mentioned anywhere in that article
- deleted 11y ago[deleted]
- discreditable 11y agoIt's in the page title. I can't find an actual SVG on that site however.
- ChuckMcM 11y agoThis is your clue: New: Scalable Vector Mask Artwork for Museum-sized Exhibits My guess is that you have to license it from them.
- cft 11y agohttps://youtu.be/gPKZSuXAVMU https://youtu.be/gPKZSuXAVMU I was watching this 1972 Intel video about the applications of the 4004 chipset, and thought that this product was more complex in the engineering sense than what 95% of the current Unicorns produce now. I find this trend worrysome long term for the Silicon Valley.
- jerf 11y agoYou might be surprised about the complexity of what is being produced in those "Unicorns". If it were simple, it would have been created forty years ago. It would also be interesting to compare the efforts made then with what it would take today to make as 4004-equivalent. It would certainly be much easier. Anyone in the field armed with the right tools care to hazard a guess?
- cft 11y agoYou are talking about either business complexity or the critical minimum amount of money that is necessary to enter and dominate a market. I am taking about the engineering complexity. They could not be created earlier for the same reason why Hollywood could not have been created in the 17th century: there was no motion pictures technology or modern internet distribution channels. But none of that tech has to do with Hollywood. The engineering complexity of Airbnb is in the ARM SOC and in the GPS constellation, but not in their app.
- silentsea90 11y agoIt isn't necessary that a Unicorn must create something technically sophisticated and intricate. Airbnb is a service, not a tech product. This is an apples to oranges comparison. There are plenty of startups that work on challenging engineering problems (though I'd have to google for the Unicorns who do that).
- kuschku 11y agoThen we should call it "Service Valley" and the people doing this "business men", not "Silicon Valley" and "software engineer". Even comparing the engineering complexity of what Google does, and what Airbnb, Uber, etc do is impossible. Many large unicorns are doing nothing new, or special. They are only clicking existing technology together. Which means they are very easy to outcompete, too.
- silentsea90 11y ago
- Aardwolf 11y agoBeautiful :) Is there a diagram with all the logic gates of this CPU available somewhere? Not sure if it's possible to tell that from this mask, I guess it is for an expert?
- Gladdyu 11y agohttp://www.4004.com/assets/4004-lajos-schematics.gif http://www.4004.com/assets/4004-lajos-schematics.gif That might be one.
- cushychicken 11y agoWow; that's even cooler than what OP was asking for. It's the actual transistor logic of the chip, unobscured by gate symbols. Very cool! It's simpler than I would have guessed!
- hatsunearu 11y ago"unobscured"? transistor level schematics are kind of unreadable at this scale. It's a better idea to represent them as blocks or at least at the gate level and notate the specifics like timing and such.
- cushychicken 11y agoIt's not easy, but it's possible. I wouldn't want to deal with one much bigger than this, though.
- deleted 11y ago[deleted]
- boyaka 11y ago"Credits: Federico Faggin, in many ways, including 4001 prototypes" And credits to Masatoshi Shima most of all (initially from Busicom but came to work at Intel and was mostly responsible for the 8080 as well, then the Z80).
- avmich 11y agoIs it possible to DIY 4004 now, given all the information? :)
- mmosta 11y agoThere already exist commercial clones of the 4004, but w.r.t. DIY the easiest way to get to the guts would be through the Verilog version on an FPGA [0]. Alternatively you could go full monty and build something like this http://www.megaprocessor.com/ http://www.megaprocessor.com/ [0] http://opencores.org/project,mcs-4 http://opencores.org/project,mcs-4
- Gladdyu 11y agoDefinitely, if you just want implement one in a HDL. For instance the RISC-V ISA has been implemented multiple times in various languages [for instance: https://github.com/ucb-bar/riscv-sodor https://github.com/ucb-bar/riscv-sodor]. RISC-V is quite a bit more complex than the 4004 ISA. If you want to DIY the entire chip, as in manually lay out the transistors, I suppose it can be done if you have quite a bit of experience in electrical engineering, but it'd be rather cumbersome given the 'modern' (as far as HDL tooling is modern) tooling that is already available.
- avmich 11y agoThank you, but the idea was to actually recreate the die itself. That's where one can use all those available masks. FPGA path is nice, but masks are useless - and instead a HDL is needed, with the whole 'nother toolchain.
- FullyFunctional 11y ago"Fabbing" your own ICs is very hard. I know only of a single DIY effort which succeed and it takes much equipment and knowledge. Personally, I'd be happy to make just a couple of transistors (see also: https://news.ycombinator.com/item?id=10558206 https://news.ycombinator.com/item?id=10558206)
- andmarios 11y agoToday a group of passionate undergraduates (guesstimate about 24 people) could probably design and build the schematics for the mask from ground up (not copying) as a semester project without neglecting the rest of their courses. The theory, the course material and the free tools (e.g for CAD and simulation) are that good! 44 years ago though, only a few talented engineers worldwide could implement it. :)
- craigjb 11y agoI would guess even less than 24. Today you can write your structural Verilog implementation, run an automatic mapping to a PDK standard cell library, and simulate to verify. The hardest part might be floor planning for something like that today. The placement and routing can all be automagical, and you won't have any timing closure issues at these speeds. I'd guess a single student could do it if sufficiently motivated. And, with CMP or MOSIS you could have it manufactured on a 350nm CMOS process by AMS for $2200 (20-25 pcs).
- Gracana 11y agoIs it really that cheap? I was just looking into this a little and I thought it was more like $10-20k for a dozen large-ish CMOS process. Got a link to pricing details for stuff in the ballpark you gave?
- andmarios 11y ago24 people for doing the work Intel's engineers did. That is given the ISA and some hints (e.g a list of components they are going to need), to start from basic components and boolean expressions, convert them to CMOS circuits by hand and then draw them efficiently in a software like Magic.
- robzyb 11y agoI designed a functional replica of the 4004 using 74-series logic in my spare time while I was doing an undergraduate degree in Business during 2009-ish.
- etep 11y agoIt is interesting and important that we refer to these masks as "artwork." Many of these older designs also have "signatures" etched into the silicon. I claim that this notion extends to code, as well, and rightly into many other engineering and scientific projects (I suspect the pure math community might agree, i.e. by my reading of how they view their own discipline). As an informal definition of art, I offer creativity within some bounds, i.e. the rules of the medium. Often, the tighter the bounds, the higher we elevate the end result (e.g. the most praised sonnet, or work of classical music). Here the bounds are pretty constrained: bug free, implements the ISA, manufacturable, and competitive and profitable. As with many here, I am frustrated with my work when it is reduced to "turning the crank," but I suspect many writers (e.g. your Reuter's journalist) feel the same; and of course, we could introduce other examples from other disciplines. If working on a ground breaking project, then I can focus on that and derive some satisfaction from my contribution to that end. Finally, my point: I submit these masks as evidence of the artificial dichotomy between the liberal arts and engineering disciplines. There should be more acknowledgement of the art produced on both sides of this divide, and more crossing the aisle (so-to-speak) from the thought leaders in this debate. Of course we need to train our next generation to work with these machines, and of course we should not kick the traditional liberal arts out of the curriculum. Sheesh. But I really would like some push back that claims our ground, i.e. technical achievement of this kind as art.
- bcohen5055 11y agoI've always disagreed with the statement that elegant engineering is art. The purpose of art is to convey a statement or emotion while engineering is to deliver the best possible solution within a pile of constraints. Scientific and engineering findings should not be seen as anything more than the outcomes of a puzzle. Although 2 engineers may arrive at slightly different results it is easy to score them and select the correct path. In art this is not possible as both artists are conveying their message, not presenting a solution.
- etep 11y agoYou are focusing on the emotive aspect of traditional art and I am focusing on the creative aspect of what is traditionally considered merely technical. I am pushing back on the merely, but I doubt you'll agree in the end. If I had to guess, you don't like the Poignant Guide to Ruby: http://poignant.guide http://poignant.guide Why is there such enthusiasm for this? If it were only about solving puzzles with clinical detachment, I doubt the guide would have gained its following. Perhaps this book is a work of art meant to convey a fascination with a purely technical subject -- but why is this so successful, when the traditional routes toward the same, namely a degree in CS taught by like minded faculty, fail in some scenarios. In my view, the reductive stance that there is no art in these disciplines, is holding us back (i.e. diminishing our culture, and hindering recruitment). Your point about purpose is well taken, and I get that. I disagree about how easy it is to score the results, and there is some inherent inconsistency when you can simultaneously refer to elegant engineering and objectively measurable best possible solution, i.e. in the latter, elegance is not a criteria, i.e. unless you make it one, it which case the contradiction is self evident. But again, this isn't going to persuade you, however, if you want to refine your position, perhaps you omit the reference to elegance :) Thank you, btw, for your comment.
- nsxwolf 11y agoI'm not sure I know how to estimate this, but I'd like to know how many 4004s you could fit on a die the size of the original 4004, if you used today's smallest transistor technology.
- jmount 11y agoI think the 4004 was a 10um (micrometer) technology and new we have 14nm (nanometer) transistors. So the individual transistors are 1400 times smaller in linear dimensions. So you could plausibly pack 1400*1400 = 1960000 or almost 2 million of those into a same sized die.
- ant6n 11y agoLets build a 1000 core cpu. And since the bottleneck will be the connections, let's build them as SOCs and bundle them with ram and ethernet.
- kruhft 11y agoHere's 144: http://www.greenarraychips.com/ http://www.greenarraychips.com/. Built to run Forth by the guy that invented Forth using Forth: http://www.colorforth.com/vlsi.html http://www.colorforth.com/vlsi.html.
- jerven 11y agoPer wikipedia 4004 has 2,300 transistors. A 18-core Xeon Haswell-E5 5.5 billion, so that is about 2.3 million of them on 22nm and 661mm2 of silicon. In that features went from 10 micro meter, to 22 nano meter! A scaling of 10,000 in 40 years. https://en.wikipedia.org/wiki/Transistor_count https://en.wikipedia.org/wiki/Transistor_count