3 ms·
Intel's Xeon Phi architecture has 60+ cores with multiple threads each, with cache coherence (albeit using a more standard dictionary): http://htor.inf.ethz.ch/
by btown 11y ago
Intel's Xeon Phi architecture has 60+ cores with multiple threads each, with cache coherence (albeit using a more standard dictionary): http://htor.inf.ethz.ch/publications/img/ramos-hoefler-cc-modeling.pdf http://htor.inf.ethz.ch/publications/img/ramos-hoefler-cc-mo... - so we're getting there.
- ajross 11y agoYes, though IIRC they had to modify the long-standing IA memory ordering rules in order to make that happen. Xeon Phi requires manual fence management in most cases, I believe.
- seanmcdirmid 11y agoNote that those particular cores are also doing SIMT like GPUs are, so the problem is different from cache coherence on general purpose cores.