wmf

29 ms·

751.
by wmf 8mo ago
This works if you have 464xlat turned on. It's mostly used by phones though.
752.
by wmf 8mo ago
ISPs can still get /24 of IPv4 today for free even after it "ran out". This comes from space that was set aside before runout. https://www.arin.net/participate/policy/nrpm/#4-10-dedicated... Th
753.
by wmf 8mo ago
Even for good assets there's a price you shouldn't pay. People are joking(?) about triple-layer SPVs where you can get pre-IPO exposure but at higher-than-IPO price.
754.
by wmf 8mo ago
Similar discussion from 10 years ago: https://news.ycombinator.com/item?id=10854570
755.
by wmf 8mo ago
The new players would each get a /24 and everyone would say that's "enough".
756.
by wmf 8mo ago
IPv6 had an implicit bridge called 6to4 but it was phased out because it wasn't that reliable.
757.
by wmf 8mo ago
You can get low power with a simple design at a low clock. This definitely will not help achieve high performance later.
758.
by wmf 8mo ago
The standard conditions are worst-case. I think it's fair to also do common-case testing as long as the details are disclosed.
759.
by wmf 8mo ago
It's pretty bad: https://www.datacenterdynamics.com/en/news/meta-report-detai... Jensen said they added a lot of RAS in Blackwell which kind of admits Hopper wasn't reliable enough.
760.
by wmf 8mo ago
It looks like the author may work for Andes. If their out-of-order implementation is weak I could see why they would push vectors as an alternative.
761.
by wmf 8mo ago
V100 and A100 are over 5 years old and you can find used ones on eBay.
762.
by wmf 8mo ago
The SXM mobo is huge because it takes 8 GPUs. It requires 10 kW of power etc. You'd be better off with the SXM-PCIe adapters.
763.
by wmf 8mo ago
Something is probably happening but I don't know what it is. Maybe this is really a negotiation over price.
764.
by wmf 8mo ago
I don't believe that Stargate is "yesterday's data center". It's being built in multiple phases and Oracle has access to Nvidia's roadmap. They know 200 kW/rack is coming. The newer phases could easily be
765.
by wmf 8mo ago
In the US DST was changed in 2005 and the change went into effect in 2007.
766.
by wmf 8mo ago
SSDs should definitely rewrite static data if it has too many ECC errors. Unfortunately we don't know much about what's going on in SSDs. Some could have much better data integrity than others.
767.
by wmf 8mo ago
If we eliminate leap seconds, we'll need a leap hour in ~500 years. It could be announced 50 years in advance.
768.
by wmf 8mo ago
That's much worse than the Y2K problem.
769.
by wmf 8mo ago
We had a leap hour yesterday...
770.
by wmf 8mo ago
reading the flash causes the row to be rewritten with the values just read DRAM works that way but flash doesn't. Read disturb is a different issue. pretty much all USB drives now use NOR flash Nope, NOR flash is much more expensiv
771.
by wmf 8mo ago
That's definitely been a topic of discussion. https://www.theatlantic.com/education/archive/2016/08/findin...
772.
by wmf 8mo ago
Maybe etching the deep trench capacitors is really tricky.
773.
by wmf 8mo ago
AMD has 16 cores, Apple has 18, Qualcomm has 18, Nvidia N1X has 20, and Intel has 24. All else being equal you actually want as few cores as you can get away with because that's less likely to be limited by Amdahl's Law. Arguably
774.
by wmf 8mo ago
Since M5 Max hasn't been released yet there's only one leaked benchmark so far which is Geekbench and everybody is (over)analyzing that score. https://www.tomshardware.com/pc-components/cpus/apples-18-co.
775.
by wmf 8mo ago
The article is probably right about text processing though. It sounds like they took an inherently parallel task with no communication and (accidentally?) crippled it.
776.
by wmf 8mo ago
We're not talking about unexplained bugs here. We're talking about a pointer that obviously has one bit flipped and it would be correct if you flipped that one bit back.
777.
by wmf 8mo ago
They're tweets.
778.
by wmf 8mo ago
Caches and registers are also subject to bitflips. In many CPUs the caches use ECC so it's less of a problem. Intel did a study showing that many bits in registers are unused so flipping them doesn't cause problems.
779.
by wmf 8mo ago
A common case is a pointer that points to unallocated address space triggers a segfault and when you look at the pointer you can see that it's valid except for one bit.
780.
by wmf 8mo ago
Supply will catch up to demand when demand goes down.

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