tverbeure

9 ms·

181.
by tverbeure 10mo ago
Current nr 3 in the leaderboard: "Show HN: I built a Rust compiler in Rust with Rust" Could use some more Rust to boost it to nr 1.
182.
by tverbeure 10mo ago
You’re thinking about the “Professional Engineer” title or some variant thereof. You’ll be happy to hear that anyone can call themselves an engineer, even in Oregon, as a Federal Court correctly decided in a first amendment case brought by
183.
by tverbeure 10mo ago
If paragraph breaks are a sign of LLM slop now, then I’m in trouble. The ones in my blog posts are rarely longer than 2 sentences and they are all handcrafted. I have a hard time staying focused when reading long paragraphs and that include
184.
by tverbeure 10mo ago
I’m surprised that H264 I-frame only compresses less than JPG. Maybe because the basic frequency transform is 4x4 vs 8x8 for JPG?
185.
by tverbeure 10mo ago
My rule of thumb is a 40x silicon area ratio between FPGA and ASIC, a clock speed that is around 5x lower. And a lot more power consumption. If you have an application that can be done on a CPU, with lots of sequences dependencies (such as
186.
by tverbeure 10mo ago
Define “upmarket” ? For me, that means higher capacity and advanced blocks such as SERDES, high-speed DRAM interfaces etc. The bottleneck in using these kind of FPGAs has rarely been the tools, it’s the amount of time it takes to write and
187.
by tverbeure 10mo ago
I don’t see how CPLDs solve anything? You write RTL for them just like you do for FPGAs, you need to configure them as well. The only major benefit is that they don’t have a delay between power up and logic active? But that’s not something
188.
by tverbeure 10mo ago
One really wonders when reading some of the comments here…
189.
by tverbeure 10mo ago
I honestly start to wonder how in the world we survived flashing 3 different binaries, for years (bitstream, 2 MCUs), without ever getting a complaint from the production floor. I should check my spam folder.
190.
by tverbeure 10mo ago
“Reduces use case and requirements to something impossibly niche and low volume then yells at the clouds.” Anyway, just tie the output of 21 emitter followers together, add a resistor and - tadaaa - 21 input OR!
191.
by tverbeure 10mo ago
The device that you were looking was not an FPGA but a GAL22V10L.
192.
by tverbeure 10mo ago
> sometimes … sometimes … sometimes … And sometimes you need support for multiple IO standards. I don’t understand what point you’re trying to get across. But if all you need is LVCMOS33, why do you not use a MAX10 FPGA with built-in vol
193.
by tverbeure 10mo ago
The strong point of FPGAs is their versatility. If you wanted an FPGA that would be easy to put on a board, you’d have to drop support for multiple voltage rails and thus multiple IO standards, which is exactly what you don’t want to lose.
194.
by tverbeure 10mo ago
> My daily Vivado experience involves typing "make", … Exactly my experience with Quartus as well. One really can’t help but wonder if those who always whine about the IDE/GUI just don’t know any better?
195.
by tverbeure 10mo ago
Or you could do the right thing, ignore the GUI for 99% of what you’re doing, and treat the FPGA tools as command line tools that are invoked by running “make”…
196.
by tverbeure 10mo ago
AV1 is not about throwing away more data that the human can’t see. It’s about having better tools. 1. the prediction tools of AV1 are better than those of h265. Better angular prediction, better neighboring pixels filtering, an entirely new
197.
by tverbeure 10mo ago
It’s great!
198.
by tverbeure 10mo ago
Or you totally love doing what you do at work and, after spending a week at the beach, you can’t wait to go back because you’re so close to solving that interesting problem you’ve been working on for more than a month.
199.
by tverbeure 10mo ago
> This incident is a stark reminder A stark reminder is a stark reminder about the existence of AI slop. You see the phrase a lot in social media comment spam.
200.
by tverbeure 10mo ago
You’re reducing a very complex problem to a meaningless slogan.
201.
by tverbeure 10mo ago
“just” is doing a lot of heavy lifting here.
202.
by tverbeure 10mo ago
I’ve spent a good amount of hours reviving a broken SRS DG535 pulse delay generator: https://www.eevblog.com/forum/repair/srs-stanford-research-d... There were many detours and scenic routes taken for what turned
203.
First Analysis of the Lunar GNSS Receiver Experiment Data(destevez.net)
2 points by tverbeure 10mo ago|0 comments
204.
by tverbeure 10mo ago
They literally went too far…
205.
by tverbeure 11mo ago
I updated a $330 new HP laptop (it flexes like cardboard) from 8GB to 32GB in May. Cost back then: $44. Today, the same kit costs a ridiculous $180. https://tomverbeure.github.io/2025/03/12/HP-Laptop-17-RAM-U
206.
by tverbeure 11mo ago
I don’t get this town square analogy. My blog is a “permanent” record of the electronics related projects that I’ve done. Things I’ve learned along the way, techniques that I’ve used, stuff that I’ve made. I’ve given myself a target of 6 bl
207.
by tverbeure 11mo ago
Yes. https://github.com/povik/yosys-slang/pull/237#issuecomment-3... I was super excited about this PR and disappointed when it turned out to be AI generated.
208.
by tverbeure 11mo ago
I was about the comment the same. It adds a lot of authenticity to the whole game loading process!
209.
by tverbeure 11mo ago
One of the images in that Chinese forum thread contain the power supply schematic of the TDS220. I haven't seen that anywhere else...
210.
by tverbeure 11mo ago
You can make the same comment for pretty much any company that outsources (some of) its production, and it’d be irrelevant, pedantic and off-topic every time. You’re also wrong. TSMC produces but a small part of the products that Nvidia sel

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