sklogic

72 ms·

271.
by sklogic 10y ago
> if the syntax were more python-y http://convergepl.org/
272.
by sklogic 10y ago
I could never stomach any podcasts (same thing with videos, of course). It is a slow and boring way of communication. You can read a text much faster, you can skim, you can easily go back to any point in this text. Audio is so inferior that
273.
by sklogic 10y ago
Types in C should not be complex. If you're hitting some kind of complexity, you're likely doing it the wrong way. C types are directly translated (one way, of course) into LLVM types. Casts are evil: they break aliasing analysis,
274.
by sklogic 10y ago
Some CFG transforms are actually much easier if you get out of an SSA first, reshuffle CFG without caring about maintaining your phis, and then simply rebuild an SSA form.
275.
by sklogic 10y ago
> Unfortunately, people don't necessarily like being test subjects in high-pressure situations. And yet somehow they love to play highly stressful, challenging video games and love to be ranked against their peers. Something to thin
276.
by sklogic 10y ago
Imagine you have one position, and 15 people were screened for an interview. What would you do with 15 contractors? Even if you run a Microsoft department it would not make much sense. Trivial problems are a good filter, as long as you mana
277.
by sklogic 10y ago
You do not need to represent a binary tree as a structure with two pointers. See how a typical Huffan tree is implemented, for example.
278.
by sklogic 10y ago
Because realistic problems tend to be far bigger than the small, fundamental building blocks.
279.
by sklogic 10y ago
What? You do not need to know anything at all. The very wording of this problem is already a solution. No thinking required. No prior knowledge required.
280.
by sklogic 10y ago
Deriving trivially provable algorithms in a test-driven way, by trial and error, hoping that no edge cases are missed? Sounds really, really depressing. The future of software engineering is very bleak if this approach is a new norm.
281.
by sklogic 10y ago
It is a 1 minute question, to be honest. Even FizzBuzz requires more thinking.
282.
by sklogic 10y ago
Why not? Pascal to PTX should be trivial (e.g., there is a lot of LLVM Pascal frontends).
283.
by sklogic 10y ago
Can you build one? Can you even source a Broadcom SoC? While Arduino-compatible MCUs can be trivially dropped into your own PCB designs. Some can even run dead-bugged with little to no effort, due to a much higher degree of integration.
284.
by sklogic 10y ago
Can you bit-bang a 640x480 VGA on a Pi? No. Not even in bare metal, no OS. But a lowly attony85 can do it easily.
285.
by sklogic 10y ago
AFAIR (cannot find sources) they are crucial for the soil formation (at least for tansfering the nutrients from the swampy areas), there've been some old Soviet studies.
286.
by sklogic 10y ago
Yet, it was really upsetting for me to see the smart and very experienced guys who wrote the beautiful CERNLIB to fall into this.
287.
by sklogic 10y ago
And I am still reaching for CERNLIB (PAW) any time I need to plot something. Could never understand why Rene Brun, Perevozchikov, et al. got so attracted to the OOP back then.
288.
by sklogic 11y ago
Of course it can be used for a general purpose stuff, but it should not , because there are always much better tools that a specialised for those domains. It's never a good idea to use a language for something it was not designed fo
289.
by sklogic 11y ago
They tried to use Julia for things like networking instead of confining it within purely numeric parts. No idea why would anyone use a DSL for doing some "general purpose" stuff.
290.
by sklogic 11y ago
Down to 50nm is possible. NMOS so far, so a bit slow, but I'd expect 1ghz to be achievable.
291.
by sklogic 11y ago
Just wait for the plastic circuits printers to become a commodity: http://semiaccurate.com/2015/11/18/arm-charts-path-printed-p... With this, a homebrew FPGA would become a reality. As well as homebrew ASICs
292.
by sklogic 11y ago
Just for fun: http://blog.notdot.net/2012/10/Build-your-own-FPGA
293.
by sklogic 11y ago
Yes, we live in a very interesting time. You can order a decent quality PCB from the likes of OCHPark for peanuts. You can fit an SoC capable of running a usable Linux into an FPGA well under £50. MCUs are cheap and powerful. Great time for
294.
by sklogic 11y ago
And why should I care? I value truth far more than all that stupid politeness and tolerance to the inferior. If HN fundamental values are different I should stay as far away from it as possible.
295.
by sklogic 11y ago
> If it's Python, it's not a DSL by definition. Scala is not any better. It's exactly the same kind of a eDSL - no macros, nothing, just generating objects in runtime and then serialising this tree into a Verilog code. Not
296.
by sklogic 11y ago
MyHDL is exactly the same kind of a eDSL as Chisel. And you have a full control of what it generates, see the examples.
297.
by sklogic 11y ago
You did not get it. MyHDL is simply a macro-processor used to generate an RTL. And generating a sequence of similar, say, module instances is ok even with an imperative language, even Verilog got for loops for this. Chisel and Clash are n
298.
by sklogic 11y ago
Android? Simple?!?
299.
by sklogic 11y ago
What an idiot! Different tasks require different languages. It's not possible to pick just one. Most people gave this moron the right answer, and yet he failed to comprehend it. And this pathetic cretin clearly never ever seen a trul
300.
by sklogic 11y ago
The best way to minimise the cognitive load is to always use DSLs.

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