rsecora

17 ms·

151.
by rsecora 5y ago
MONIAC in action at the Reserve Bank Museum & Education Centre, Wellington, New Zealand. https://www.youtube.com/watch?v=rAZavOcEnLg
152.
Moniac: Monetary National Income Analogue Computer(en.wikipedia.org)
5 points by rsecora 5y ago|1 comments
153.
War Is a Racket. (1935)(ratical.org)
12 points by rsecora 5y ago|1 comments
154.
Why is this C++ code faster than my hand-written assembly (2016)(stackoverflow.com)
3 points by rsecora 5y ago|0 comments
155.
Nginx optimization: Understanding sendfile, TCP_nodelay and TCP_nopush(thoughts.t37.net)
4 points by rsecora 5y ago|0 comments
156.
Lisp Macros, Delayed Evaluation and the Evolution of Smalltalk(blog.metaobject.com)
2 points by rsecora 5y ago|0 comments
157.
Design Principles Behind Smalltalk (1981)(cs.virginia.edu)
2 points by rsecora 5y ago|0 comments
158.
How the Finnish survive without small talk (2018)(bbc.com)
65 points by rsecora 5y ago|48 comments
159.
Why GNU grep is fast(lists.freebsd.org)
4 points by rsecora 5y ago|0 comments
160.
by rsecora 5y ago
Previous discussion https://news.ycombinator.com/item?id=2711231
161.
OpenGL vs. Direct3D(programmers.stackexchange.com)
5 points by rsecora 5y ago|1 comments
162.
by rsecora 5y ago
Underrated comment
163.
by rsecora 5y ago
Its not really a 70s problem, its a solution to a problem if the 1970s. RISC machines raised bus error if not properly aligned to avoid "double" access to the same value. https://en.wikipedia.org/wiki/Bus_erro
164.
by rsecora 5y ago
Its not only due to cache misses. If the memory access is not aligned a bus fault will be raised in a lot of CPU architectures. Thats the 70s problem described in the documentation
165.
by rsecora 5y ago
This post shows how knowledge is lost with the past of time. >> Modern CPU hardware performs reads and writes to memory most efficiently when the data is naturally aligned. Is not only "modern" CPUs, every RISC (80s, 40 year
166.
by rsecora 5y ago
Poe's law. As Mr Poe says 16 years ago. Without a winking smiley or other blatant display of humor, it is utterly impossible to parody XXXXXXX in such a way that someone won't mistake for the genuine article.
167.
by rsecora 5y ago
Poe's law in motion.
168.
by rsecora 5y ago
Selling shovels during a gold rush is the surest way to stay wealthy.
169.
Snaring the Bad Folks / Cloud security is a hard problem(netflixtechblog.com)
1 points by rsecora 5y ago|0 comments
170.
More dangerous subtleties of JOINs in SQL(alexpetralia.com)
2 points by rsecora 5y ago|0 comments
171.
Rapid Development with GraphQL Microservices(netflixtechblog.com)
1 points by rsecora 6y ago|0 comments
172.
by rsecora 6y ago
Some satellite broadcasting platforms still use VMS for mixing the data carrousel with the mpeg transport streams. One of those services, millions use it everyday without knowing it.
173.
by rsecora 6y ago
Parent comment ask about the OS descendant from VAX/VMS, that is being ported to x86. The subject of this thread. https://en.wikipedia.org/wiki/OpenVMS
174.
Project Code Rush: Documentary on the development of Mozilla (1998-2000)(youtube.com)
2 points by rsecora 6y ago|0 comments
175.
Microsoft Opens Up Old Win32 APIs to C# and Rust(visualstudiomagazine.com)
105 points by rsecora 6y ago|47 comments
176.
Wine 6: Vulkan, DirectShow, DirectMedia...(winehq.org)
1 points by rsecora 6y ago|0 comments
177.
by rsecora 6y ago
First step check if the external wan IP address has changed. Second Check the logs of the pppoe daemon in your router. (If the router provides such logs).
178.
Ancient Commodore Amiga Runs the Heat and AC for 19 Public Schools (2015)(popularmechanics.com)
3 points by rsecora 6y ago|0 comments
179.
Google reveals sophisticated Windows and Android hacking operation(zdnet.com)
4 points by rsecora 6y ago|0 comments
180.
Cloning a reference and method call syntax in Rust(fpcomplete.com)
1 points by rsecora 6y ago|0 comments

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