mshockwave

8 ms·

61.
by mshockwave 2y ago
This is also one of the reasons I write C++ with vim without any auto-completion nor fancy plugins (I do use syntax highlighting though, but I think it comes by default with vim nowadays), as well as using GNU screen -- not every machines i
62.
by mshockwave 2y ago
> No one's doing ASM programming on x86 CPUs these days I don't think that's entirely true...it's still pretty common to write high-performance / performance sensitive computation kernels in assembly or intrinsic
63.
by mshockwave 2y ago
> (Intermediate)1. Adding to memory faster than adding memory to a register I'm not familiar with Pentium but my guess is that memory store is relatively cheaper than load in many modern (out-of-order) microarchitectures. > (Inte
64.
by mshockwave 2y ago
Reminds me that's also many people's speculation on how Qualcomm builds their RISCV chips -- swap an ARM decoder for a RISCV one.
65.
by mshockwave 2y ago
RP2350 is using a hybrid of ARM and RISCV already. Also it's not really hard to use RISCV not as the main computing core but as a controller in the SoC. Because the area of RISCV cores are so small it's pretty common to put a doze
66.
by mshockwave 2y ago
I think this is indeed invented for controlled burns in fighting bush fires
67.
by mshockwave 2y ago
I'm actually glad to see that restriction in their study, because there are many cases where you just can't / more difficult to use PGO. One of the most common reasons I ran into is that clients refuse to use it (no, I'm
68.
by mshockwave 2y ago
I only buy keyboards, even when I wanted a compact one, with home/end keys because it's so much more productive especially in coding in a terminal.
69.
by mshockwave 2y ago
> If you’re relying on it then you’re playing with fire. Unfortunately I think Linux kernel is one of the most notable examples in which case you have to compile with -O1 or up.
70.
Scheduling Model in LLVM – Part II(myhsu.xyz)
2 points by mshockwave 2y ago|0 comments
71.
by mshockwave 2y ago
NASA used to be nice over SLS was that they really didn't have a choice + congress pressure (hiring people who lost their jobs due to space shuttle cancelation) but now it seems like NASA _does_ have a choice to choose an alternative (
72.
by mshockwave 2y ago
can confirm fast math makes the biggest difference
73.
by mshockwave 2y ago
which flags did you use and which compiler version?
74.
by mshockwave 2y ago
I have the same feeling watching Starship when the telemetry on the bottom right of the screen showing “0km” but landing burn hasn’t started. Later did I know that it was meant to start the burn only a few hundreds _meters_ from the ground
75.
by mshockwave 2y ago
I think saving weight is definitely one of the main issues, see those proportionally large legs on Falcon-9, I guess it simply doesn't scale on bigger vehicles like Starship / Heavy booster. Also, by catching the booster on site,
76.
by mshockwave 2y ago
> Heh, there were literally CPUs with some support for the JVM! Jazelle, a dark history that ARM never wants to mention again
77.
When LLVM scalable vector meets RISC-V(myhsu.xyz)
6 points by mshockwave 2y ago|0 comments
78.
by mshockwave 2y ago
I was just wrapping my head around on how do they even run linux on the RISC-V microcontroller they use. Turns out there is a separate ARM for application processor.
79.
by mshockwave 2y ago
Because it’s probably not the real number. The reason why they wanted to release at least _some_ specs is probably because congress / parliament
80.
by mshockwave 2y ago
Switching from individual schedulers to unified one for integer execution makes sense to me, but I still don’t quite understand why FP execution units do the opposite, could somebody explain why?
81.
Scheduling Model in LLVM(myhsu.xyz)
86 points by mshockwave 2y ago|3 comments
82.
by mshockwave 2y ago
LLM likes to use "delve" doesn't mean every usages of "delve" imply LLM
83.
by mshockwave 2y ago
LLVM tries to canonicalize all the loops into one of the two canonical forms[1] before doing any useful analysis and transformations. It has been quite effectives. Not all loops can be shaped into a canonical one though. [1]: https:/&
84.
by mshockwave 2y ago
I'm not an expert in this field but I feel like the key is to make Dragon as a platform cheap, and once that happens more rides can be carried (to ISS) hence making the system battle-tested. Being cheap and reliable are the two major r
85.
by mshockwave 2y ago
could somebody ELI5 what is happening to this program? delays after delays, and now they might need to send another spacecraft to bring people back. It will be hilarious if that turns out to be a SpaceX Dragon.
86.
by mshockwave 2y ago
I feel like Microsoft's current stand on this is weird. They're either not as enthusiasting as Qualcomm and just riding along, or their terrible execution makes them move really slow.
87.
by mshockwave 2y ago
> Not sure I understand that. Is it something specific to Swift, or is it exactly what is expected from using shared libraries? More of a shared library issue I believe. > Say my Linux distribution distributes some Swift runtime, then
88.
by mshockwave 2y ago
Today I definitely learned! I feel like we can just patch strace to read debug info (and use it in stack trace) when present.
89.
Legalizations in LLVM Back End(myhsu.xyz)
1 points by mshockwave 2y ago|0 comments
90.
by mshockwave 2y ago
And IIUC this is used to generate EMP without using nuke, so you’ll knock out the whole neighborhood powergrid too!

More ›