janwas

20 ms·

271.
by janwas 4y ago
Here is my source: https://github.com/VcDevel/std-simd Ah, but this repo mentions that the GCC 11 implementation apparently also works with clang: https://github.com/VcDevel/Vc . Thanks!
272.
by janwas 4y ago
What leads you to think the list of applications I enumerated is 'niche'? > in order to implement properly efficient SIMD algorithms you need experts that are rare Some truth to this, but many algorithms can be implemented once
273.
by janwas 4y ago
Is there a source for a decision having been made for _all_ their consumer CPUs, not just ADL?
274.
by janwas 4y ago
The hatred is specifically directed at "FP" which I understand to be floating-point. Makes sense inside an OS kernel but a large majority of HPC would indeed consider this irrational. I understand that dark silicon is helpful, but
275.
by janwas 4y ago
From what I have seen, this is unfortunately not very useful: it mainly only includes operations that the compiler is often able to autovectorize anyway (simple arithmetic). Support for anything more interesting such as swizzles seems nonex
276.
by janwas 4y ago
Before we consider the technical merits, let us note that Linus admits to "irrational hatred" and "bias" on this topic. It's also not clear to me how much experience he has developing and testing AVX-512. As others
277.
by janwas 4y ago
It would be simpler to use the portable intrinsics from github.com/google/highway (disclosure: I am the main author). You include a header, and use the same functions on all platforms; the library provides wrapper functions which
278.
by janwas 4y ago
A compiler turning C(++) code into SIMD instructions is called "autovectorization". In my experience this works for simple loops such as dot products (even that requires special compiler flags to enable FMA and reorders), but unfo
279.
by janwas 4y ago
I'm curious why you say they are very different? From where I sit, RVV also supports mask-like predication, and adds two concepts: LMUL (in-HW unrolling of each instruction) plus the ability to limit operations to a given number of ele
280.
by janwas 4y ago
We also experimented with 4x4 networks but it's very helpful to use 256 or 512-bit SIMD. You might give our vqsort a try, it's quite a bit faster than std::sort: https://github.com/google/highway/blob&#x2
281.
by janwas 4y ago
Yes indeed. IIRC std::sort's sorting network is only 3-7 elements wide. With SIMD we can handle 256. The trick is to minimize shuffling by reshaping 1D input to 2D and first sorting the columns. Previously one would then transpose (exp
282.
by janwas 4y ago
Hash function quality varies a lot. Especially if you are memory-limited, it can help to use a round-reduced cryptographic hash to rule out unnecessary collisions. Example: Speck (= add/rotate/xor), but just reducing the number of
283.
by janwas 4y ago
> Maybe we'll even see quadruple pumping for AVX-512 some day? > can allow AVX-512 to sort of act like SVE, but with the benefits of a fixed size architecture (i.e., shuffles); compile one set of code and you're able to run
284.
by janwas 4y ago
:) Obvious or not, one does still occasionally hear "give us more cores instead". I agree about the communication cost. Higher clocks are harder - quadratic increase in power. For shared-nothing problems, an array of wimpy (low fr
285.
by janwas 4y ago
Physical design is outside my area of expertise, but I understand that a large part of the increase may be due to improved fab. 15-20% speed improvement per node would account for the majority of the clock speed gain. Also, with smaller fea
286.
by janwas 4y ago
Good point about the second FMA. I'm not certain it's the best tradeoff, Genoa only has two half-width FMA. I share your hope for more focus on vectors. It's also up to us software devs, CPUs will not invest as heavily if we
287.
by janwas 4y ago
Great in-depth article. One especially interesting data point relevant to ongoing discussions about AVX-512 area cost: 40% of 2.93 mm2 per core is AVX-512, so 1.14 mm2. This is a large fraction, but as the article says the core is basically
288.
by janwas 4y ago
> Also if I try to isolate the SIMD bits in C++ I’ll lose the opportunity to have them be inlined which will defeat the optimization purpose. Agreed. Usually the interface would be something like RunEntireAlgorithm(), not DotProduct(). &
289.
by janwas 4y ago
Interesting. Any thoughts on where they can be found?
290.
by janwas 4y ago
:) Tricky. Is it an option to build some source files with C++, and use C functions (the usual FFI) as the interface between them?
291.
by janwas 4y ago
Nice! > I never come across people in the wild that actually do this also, it’s such a niche area of expertise. I'd guesstimate there are several hundred of us working on vectorization :)
292.
by janwas 4y ago
I beg to differ :) std::experimental::simd has a very limited set of operations: mostly just math, very few shuffles/swizzles. Last I checked, it also only worked in a recent version of GCC. We do indeed have cross-platform intrinsics
293.
by janwas 4y ago
To avoid the various ambiguities here, I learned to express speedups as a ratio of the optimized throughput, divided by the baseline throughput. Or equivalently: the baseline time divided by optimized time. 4400 MB/s vs 800 MB/s =
294.
by janwas 4y ago
I have a lot of sympathy for wanting efficient code. But let's indeed have a look: https://github.com/FFmpeg/FFmpeg/blob/7bbad32d5ab69cb52bc92a... There are so many macros, %if and clutter here that it&#
295.
by janwas 4y ago
Here's a first draft, comments welcome: https://github.com/google/highway/pull/1078 .
296.
by janwas 4y ago
Got it :) Yes, I'll also check our x86_128 file for #if; those are some of the potholes in SSE4 which are filled by AVX2 or AVX-512.
297.
by janwas 4y ago
Great points! It seems useful to add a list based on yours to our readme. Please let me know if you'd like us to acknowledge you in the commit message with anything other than the username dzaima.
298.
by janwas 4y ago
Further to that, many use cases of Quicksort have unique keys, so stable is the same as unstable. Example: ascending indices appended to the key, when sorting large records where we don't want to move around the entire record.
299.
by janwas 4y ago
:) Indeed, we're seeing 10x speedups from SIMD for some distributions. It's useful both for sorting networks and quicksort partitioning. Code here: https://github.com/google/highway/tree/master/
300.
by janwas 4y ago
To clarify, are you saying the entire app was slower with AVX than it was with SSE4? That would be surprising, because 2x vector width is expected to outweigh 10-20 percent downclocking. Even more so with Haswell, which adds FMA and thus do

More ›