dzaima

7 ms·

61.
by dzaima 6mo ago
`edit` is still useful; just, for ..editing (!) something, instead of viewing it. If you have some unfinished changes at the tip and want to temporarily checkout something 2 weeks ago, you `jj new` to there (similar to `git stash; git switc
62.
by dzaima 6mo ago
Unfortunately, that's only vector, and ≤16-bit ints at that, no 32-bit ints; and as the other reply says, nearly non-existent multiply-high which generally makes vectorized div-by-const its own mini-hell (but doing a 2x-width multiply
63.
by dzaima 6mo ago
jj's template and revset languages are very simple syntactically, so once you're comfortable with the few things you do use often it's just a question of learning about the other existing functions (even if only enough to kno
64.
by dzaima 7mo ago
> It surprises me that the compiler doesn't still take the inference from the assert and just disable emitting the code to perform the check. That's because that's what the <assert.h> assert() must do; it's spec
65.
by dzaima 7mo ago
In git if you, say, do some `git rebase -i`, edit some commit, continue the rebase, and hit a conflict, and realize you edited something wrong that caused the conflict, your only option is aborting the entire rebase and starting over and re
66.
by dzaima 7mo ago
But you do have the op log, giving you a full copy of the log (incl. the contents of the workspace) at every operation, so you can get out of such mistakes with some finagling. You can choose to have a workflow where you're never direc
67.
by dzaima 7mo ago
> as it's an app from a verified developer. Well that's if they go through the verification process, which does not seem like a thing they'd want to do - https://f-droid.org/en/2026/02/24&#x2
68.
by dzaima 7mo ago
As far as I know, the ARM (at least aarch64) situation should be about the same as x86-64. Anything specific that's bad about it? (there's aarch32 NEON with no subnormal support or whatever, but you can just not use it if determin
69.
by dzaima 7mo ago
> This means that all medium price or high price smartphones that were introduced during the last 4 years have SVE2 support. Except Qualcomm chipsets, which disable SVE even if all ARM cores used support it. ("Snapdragon 8 Elite Gen
70.
by dzaima 7mo ago
Indeed we shall hope heuristics update; but of course if no compilers emit it hardware has no reason to actually bother making fast misaligned ops, so it's primed for going wrong.
71.
by dzaima 7mo ago
> No, it was released to customers in June 2021, almost five years ago. Ah, okay. (still, like, at least a couple decades newer than the last x86-64 chip with slow unaligned mem ops, if such ever existed at all? Haven't heard of &#x
72.
by dzaima 7mo ago
P550 is, like, what, only a year old? I suppose there has been some laughing at it at least. Also Kendryte K230 / C908, but only on vector mem ops, which adds a whole another mess onto this. I'd hope all the massive OoO will hav
73.
by dzaima 7mo ago
Of course that'd result in entirely-avoidable slowdown for the potentially-misaligned ops. Perhaps fine for a program that doesn't use them frequently, but quite bad for ones that need misaligned ops everywhere. In terms of correc
74.
by dzaima 7mo ago
2 is basically infeasible with RISC-V being intended for a wide range of use-cases. 1 might be ok but introduces a bunch of opcode space waste. Indeed extremely sad that Zicclsm wasn't a thing in the spec, from the very start (never mi
75.
by dzaima 7mo ago
Yeah, that is quite funky; and indeed gcc does that. Relatedly, super-annoying is that `vle64.v` & co could then also make use of that same hardware, but that's not guaranteed. (I suppose there could be awful hardware that does vle
76.
by dzaima 7mo ago
There is Zmmul for multiplication-but-not-divide.
77.
by dzaima 7mo ago
Well, we don't necessarily have to wait for Oilsm; software that wants to could just choose to be opinionated and run massively-worse on suboptimal hardware. And, of course, once Oilsm hardware becomes the standard, it'd be fine t
78.
by dzaima 7mo ago
> How is that different for RISC-V? RISC-V hardware with slow misaligned mem ops does exist to non-insignificant extent, and it seems not enough people have laughed at them, and instead compilers did just surrender and default to not usi
79.
by dzaima 7mo ago
I don't think x86/ARM particularly guarantee fastness, but at least they effectively encourage making use of them via their contributions to compilers that do. They also don't really need to given that they mostly control who
80.
by dzaima 7mo ago
The option to generate or not generate misaligned loads/stores does exist (-mno-strict-align / -mstrict-align). But of course that's a compile-time option, and of course the preferred state would be to have use of them on b
81.
by dzaima 8mo ago
The type seems to just be a small wrapper around a BigDecimal; the actual conversion arithmetic will presumably be relatively extremely slow regardless, a single extra allocation (in addition to BigDecimal's ≥3) won't change much.
82.
by dzaima 8mo ago
To be clear I do kinda agree with the general idea that modding isn't that important to Minecraft Java; but it's still very important at least indirectly - were there not as large of a modding scene, I'd imagine many more c
83.
by dzaima 8mo ago
The main actual speedrunning categories don't allow any RNG changes; but I doubt anyone doing RSG would have any interest whatsoever going back to the 20x-or-whatever slower seed rolling, that's just a completely utterly dumb wast
84.
by dzaima 8mo ago
Speedrunning is very much modded - ranked (the big content) is just flat out modded (not just the match setup, there are game tweaks too (guaranteed blaze drops after 20 or so iirc, guaranteed dragon perch in ≤3 mins)), and even RSG/SS
85.
by dzaima 8mo ago
You don't need to write a new loop every time a new vector size drops, but over time you'll still get more and more cases of wanting to write multiple copies of loops to take advantage of new instructions; there are already a good
86.
by dzaima 8mo ago
RVV still very much requires you to write a manual code/assembly loop doing the "compute how many elements can be handled, decrease count by that, repeat if necessary" thing. All it does is make it slightly less instructions
87.
by dzaima 8mo ago
It's beneficial for the average user to know that other clients exist at the very least; it's rather common in the matrix space I'm in that someone asks "how do I do X" without clarifying which client they use, and
88.
by dzaima 8mo ago
I've certainly encountered clang & gcc not finding or just not having header files a good couple times. Mostly around cross-compilation, but there was a period of time for which clang++ just completely failed to find any C++ header
89.
by dzaima 8mo ago
It only does if & while, not for. A goto in a single-pass thing would need separate handling for forwards vs backwards jumps, which involves keeping track of data per name (in a form where you can tell when it's not yet set; wherea
90.
by dzaima 8mo ago
Clicked on the first thing I happen to be interested in - SIMD stuff - and ended up at https://github.com/anthropics/claudes-c-compiler/blob/6f1b99... , which is a fast path incompatible with the _mm_free impl

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