diamondman

7 ms·

31.
by diamondman 11y ago
My friend put it up on his blog until I get around to making mine again. http://curtis.io/others-work/open-tooling-for-fpgas
32.
by diamondman 11y ago
As kyboren says fpga compiling is crazy intensive. This is because we are mapping physical resources and things have to physically fit instead of just being able to arbitrarily jump somewhere else in the program. It becomes a huge constrain
33.
by diamondman 11y ago
Just wanted to add that many FPGAs physically support updating parts of their configuration without turning off or stopping the rest of the chip. This is just very hard to do without the docs we need of the chips, and almost no one does it.
34.
by diamondman 11y ago
Check out the Milky Mist http://m-labs.hk/m1.html
35.
by diamondman 11y ago
PART 3/3 MY PROJECT: I want to pave the way for FPGAs to be usable in everything from laptop/desktop computers to phones (if the static power consumption gets better). I have some very interesting ideas of what an average user cou
36.
by diamondman 11y ago
PART 2/3 LOADING or 'FLASHING' With out final bitstream file in hand, we obviously want to shove it into an fpga. But how? For anyone who has programmed microcontrollers directly you know you need a box that lets your compute
37.
by diamondman 11y ago
PART 1/3 The lack of open tools is a huge problem. My friends on IRC are working on reverse engineering multiple chips enough that full compilation tool chains can work. My part of the project is working to make a highly generic method