dfox

43 ms·

541.
by dfox 5y ago
The Lenovo generation of external UltraNav keyboard has one huge desing issue: the cable is conneted by USB micro B and thus it is not question of if, but when it will break. I thought about just soldering the cable directly into it, but th
542.
by dfox 5y ago
It is probably better to stick with 2G+4G combination, as in that case it is less picky about the correct type of the 4G module (as in, there are modules that work in this configuration, but not as 2x4G) and IIRC the chipset cannot address
543.
by dfox 5y ago
https://magcius.github.io/xplain/article/x-basics.html Last time I checked it was work in progress and I'm not sure how complete it is at this moment, but it includes understandable explanations of the low-le
544.
by dfox 5y ago
Which is highly ironic as the probably only WM written in Java (Project Looking Glass) is not reparenting. IIRC the issue with AWT and non-reparenting WMs is mostly limited to popup (ie. override-redirect) windows that are positioned in rel
545.
by dfox 5y ago
In real-mode DOS the situation is that the program is loaded to continuous block of memory that is followed by it's BSS and heap. The MZ header only specifies how big the BSS+heap part should be. Typical MZ format EXE has the size spec
546.
by dfox 5y ago
Then the resulting complexity would be O(n^2). With some kind of heap-like priority queue as used in typical general purpose OS you get O(n*log(n)) or something close to that.
547.
by dfox 5y ago
It is if you ignore how the underlying OS implements multitasking and sleep() in particular. And the kernel-side implementation usually involves some kind of priority queue of sleeping threads. So taken as a whole sleep-sort is just an conv
548.
by dfox 5y ago
Indeed. But the difference between modern Perl/Ruby/Python/Java/Whathewer frameworks that use some kind of application container and PHP is that in the first case you know what is shared and work in the world with shared
549.
by dfox 5y ago
The whole PHP opcache hack works reliably only on platforms that have fork(2).
550.
by dfox 5y ago
The part that is relevant for CPython is implemented by it since at least 2.0. The rest is horrible hack that involves abusing shared memory to share what effctively are parts of GC'd heap between unrelated interpreter instances. Usefu
551.
by dfox 5y ago
Earlier versions of Intel Management Engine used ARC core. It is somewhat funny to see Intel licensing third-party CPU IP core to use in their CPUs of all the things…
552.
by dfox 5y ago
In non-embedded contexts it is usual for ELF executables to have program header that includes ELF header and program headres and maps this to begining of address space used by that binary. At least on Linux the address where it is mapped to
553.
by dfox 5y ago
Today, probably the easiest way to run MVS in Hercules is this: http://wotho.ethz.ch/tk4-/
554.
by dfox 5y ago
IIRC the whole common HW platform of late model E-series Symbian phones from Nokia was code named BB. Both E61 and E91 call themselves (IIRC) "BB v5.0" in USB descriptors.
555.
by dfox 5y ago
The selling point of various GNU userland tools and libraries in the 80's was better performance, removal of obscure bugs and limitations and then maybe some useful extensions. Case in point is that most people have no idea of how POSI
556.
by dfox 5y ago
The part about detecting stack overflows probably refers to implementation strategy in some scheme implementations (IIRC chicken scheme does this) which involve using the platform/machine stack as effectively hardware-assisted nursery
557.
by dfox 5y ago
The point about number of MAC filters is fairly moot as when you do bridging in hardware you are not going to utilize any kind of hardware MAC filtering capability anyway. Also the issue of flooding tends to be solved by the physical switch
558.
by dfox 5y ago
On essentially every PC that supports different sizes of RAM modules the firmware has to jump through somewhat interesting hoops in order to configure/enable the memory controller. DDR4 training is just one part of this. Typical flow g
559.
by dfox 5y ago
The last paragraph is what the FB's timecard (and essentially any other rubidium based frequency normal) does. You use the GNSS frequency output as a reference for PLL that does fine tuning (on the order of tens of ppm) of the rubidium
560.
by dfox 5y ago
One alternative would be to place the whole GNSS receiver outside and only run serial port and PPS signal from it (cat5 has just the right amount of pairs for RS-422 UART, RS-422 PPS and power. And is significantly cheaper than coax that is
561.
by dfox 5y ago
I somewhat suspect that WordPad is the only MS application that actually follows all the MS recommendations about usage of Win32 API and Windows HIG/UX.
562.
by dfox 5y ago
What seems particularly interesting is that the board seems to really be just an RTC, yet does not have any obvious place for backup battery and has 10MHz oscillator on it.
563.
by dfox 5y ago
HFS+ is still only somewhat extended HFS and the filesystem itself does not support hardlinks to anything. The support for hardlinks is simulated in upper layers which while being questionable design on its own somewhat alleviates the usual
564.
by dfox 5y ago
There is a difference between “allows hardlinks to directories to exists” and “allows user to straighforwardly create them”. As for existence most unix filesystems have exactly zero issue with that, while on systems that allow you to link(2
565.
by dfox 5y ago
You can link a file that is outside of that directory and thus get write access to that file. (Canonical example is linking /etc/passwd somewhere where you expect root to do chown -R you .)
566.
by dfox 5y ago
In my understanding the diference between deploying 5G-NR-NSA and SA is mostly an software one. You need to have 5G capable RRU heads anyway. On the other hand from the bussiness and operations side there are two things: (1) 5G-NR-SA does n
567.
by dfox 5y ago
IIRC on CM-1/2 the LEDs reflected state of conditional execution of the individual VLSI packages (there is one LED per package, not one LED per CPU), on CM-5 it is just a bunch of LED matrices controlled more or less globally by I assu
568.
by dfox 5y ago
The architecture is significantly different from what you would find in typical GPU. But the programming model can be considered similar to early days of GPGPU programming on hardware that was not designed for that usage (ie. no control flo
569.
by dfox 5y ago
I assume that there were two completely different CMLisp/StarLisp implementations as the language described by Hillis' disertation and StarLisp paper (ie. with xexctors and xaps) is significantly different in the overall design fr
570.
by dfox 5y ago
CM-1 lacks floating-point hardware, which anecdotally made it unsuitable for the typical supercomputer number-crunching tasks, that makes 1GFLOP somewhat questionable. Hillis' thesis quotes 1000MIPS for the 4MHz prototype. I believe th

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