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Hayabusa-2 probe uses 64-bit MIPS CPU to explore the origins of the solar system
- Symmetry 11y agoI wonder how the radiation protection process works?
- simcop2387 11y agoFrom what I know the exact ways it's done are usually kept as trade secrets because it's a very difficult thing to do and you want to recoup all the research costs of it, but wikipedia has some high level ways it's done: https://en.wikipedia.org/wiki/Radiation_hardening#Radiation-hardening_techniques https://en.wikipedia.org/wiki/Radiation_hardening#Radiation-...
- InclinedPlane 11y agoPrimarily they use "silicon on insulator" fabrication, such as silicon on sapphire. Since the feature size on these chips is usually many revs behind the current state of the art that results in fairly large transistors on die which helps a bit as well. There are some other techniques used (such as designing to avoid latch-up) but the fabrication technology is the major difference. As much as I hate slide decks as an information source, this one is actually moderately informative: http://meseec.ce.rit.edu/551-projects/fall2013/2-2.pdf http://meseec.ce.rit.edu/551-projects/fall2013/2-2.pdf
- alexvoica 11y agoHere is a quote from the product spec about the radiation hardening technology that HIREC developed: Space radiation environments present severe problems in semiconductor devices for space use. Conventional space-use devices are fabricated with special radiation-hardened processes. However, it was not feasible to continue this method because it was difficult to maintain and manage the manufacturing processes. In addition, it will be necessary to utilize state-of-the-art commercial processes to improve the performance of integrated circuits for space use. HIREC established the Customer-Owned Tooling (COT) procedure for developing advanced LSI circuits for space use. Hardening techniques utilizing the hardness-by-design (HBD) approach are utilized to ameliorate Single-Event Effects SEE).* Moreover, a radiation-hardened ceramic package is utilized to reduce the influence of Total Ionization Dose (TID).
- bsder 11y agoNowadays, mostly architectural. Some design. Not as much process. They call it "hardening-by-design" which translates to "not rad-hard, at all, just fault tolerant" Architecturally, you put in a lot of fault tolerance. Multiple oscillators so you don't lose lock. More ECC for RAM. Modulo checks for arithmetic. The ability to reboot quickly and get back to operational from a checkpoint is useful. Voting on operations to detect failures. Design-wise, you minimize nodes that can cause upsets. You put more charge on gates and only use static CMOS. Presumably, you use bipolar (which is current-driven rather than voltage driven like CMOS) anywhere you can without losing a lot of area (PLL's, I/O's, RF, analog circuitry). Process-wise, insulating substrate is the obvious thing since it minimizes the collection of ionized charge. I doubt they do much more. Developing stable materials for semiconductor usage is really expensive, and not terribly profitable.
- hga 11y agoGoogle helped me find this very detailed article on the probe: http://www.spaceflight101.com/hayabusa-2.html http://www.spaceflight101.com/hayabusa-2.html Which says the solar panels are designed to produce 1,400 watts at the furthest distance from the sun. So it gets this 200 Mhz 64 bit MIPS chip, whereas the ~200 watts at Pluto New Horizons uses a 12 Mhz 32 bit MIPS chip (and the power gets steadily lower as it heads out and hopefully looks at a Kuiper belt object).
- Someone 11y agoI don't know anything about architecture or power usage of these CPUs, but it wouldn't even surprise me if that 200MHz CPU took less power than that 12 MHz one. There also is a window of almost 9 years between the launch dates of these systems (January 2006 vs December 2014) That's six times the 18 months of Moore's law, or a factor of 64, so it could explain much of the difference.
- alexvoica 11y agoMaximum TDP for HR5000 is 4-6W (fact) whereas the Mongoose-V might be in the sub 1W range (speculation).
- alexvoica 11y agoI have a feeling Mongoose-V (32-bit MIPS) is manufactured in a 0.18um process node. I'm not 100% sure but it would coincide with the time of the release. HR5000 (64-bit MIPS) might be manufactured in a more recent SOI process node.
- gaius 11y agoFor real work you want MIPS or SPARC, Intel just don't cut it.
- akuma73 11y agoMay I ask why?
- gaius 11y agoEasier/more efficient to program in stack-based languages like Forth, lower power consumption, simpler designs are easier to radiation-harden, and more. Why do you think no-one uses Core i7 in space? Dunno who downvoted me, some fanboy probably. Nevermind I got karma to burn.
- alexvoica 11y agoFor anyone still reading this, I'm interviewing the JAXA engineering team this week. If you have any specific questions you'd like me to ask, reply to this comment.