3 ms·
Comparing a 1 cycle scratchpad latency to Intel's 4 cycle L1 latency is misleading. Are you making chips that operate at up to 4GHz, or is this just 128KB of lo
by Scaevolus 11y ago
Comparing a 1 cycle scratchpad latency to Intel's 4 cycle L1 latency is misleading. Are you making chips that operate at up to 4GHz, or is this just 128KB of local SRAM attached to a ~1GHz core?
- davisourus 11y agoIf you have 4 GHz of processing IEEE but getting a wrong answer at the end, how do you compare that to a smaller number of FLOPS with a rigorously-bounded answer? I'm not saying they're apples to oranges, I'm saying that you can't just compare the quality of two foods based on calorie count alone.
- trsohmers 11y agoIf you care about efficiency, then you are burning significantly more energy to run at 4GHz, and are still moving the same amount of data in and out of your local memory. If that is your bottleneck, then you are running at 4x the clock speed for no real gain, as your memory can't keep up with the speed of your functional units. But to answer your question directly, we are targeting 1GHz conservatively...we think it could do more, but as we are focused on efficiency, we think it is a good middle ground between performance and energy usage. We'll be able to make a more informed decision (and possibly change that) when we have silicon in hand.