5 ms·
So if these comparative benefits are objectively measurable and designs are freely available, why haven't they been commercialized yet?
by saosebastiao 11y ago
So if these comparative benefits are objectively measurable and designs are freely available, why haven't they been commercialized yet?
- wmf 11y agoThe spec isn't even finished and it takes time to commercialize technology.
- hga 11y agoIndeed, it's way too soon to expect many, if any. MMU/protected mode draft? specs weren't released when I looked at it earlier this year (they're out, now, as I understand).
- hga 11y agoEchoing the other sub-thread, see this lowRISC summary from the introduction of the workshop: State of the RISC-V Nation: many companies ‘kicking the tires’. If you were thinking of designing your own RISC ISA for project, then use RISC-V. If you need a complete working support core today then pay $M for an industry core. If you need it in 6 months, then consider spending that $M on RISC-V development.
- microcolonel 11y agoGiven the estimates for time spent closing a deal with ARM, You could probably be actively engaged for those 6 months, and get your core in the same time frame.
- hga 11y agoIs this one of the reasons MIPS is still getting design wins? How many years does it take to negotiate with ARM???
- wtallis 11y agoIs MIPS still getting new design wins? I know that existing MIPS SoCs are still being used all over the place (eg. wireless routers) but is anyone actually working to put a MIPS core on a 20nm or smaller chip?
- _chris_ 11y agoThere already are shipping, commercial RISC-V cores. The end-products are things like cameras though, so they're not very likely to make the tech blog rounds.
- cmrx64 11y agoSource? Link?
- _chris_ 11y agoSlide 35 from the RISC-V workshop (http://riscv.org/workshop-jun2015/riscv-intro-workshop-june2015.pdf http://riscv.org/workshop-jun2015/riscv-intro-workshop-june2...). I've also personally talked with some of the engineers who have shipped RISC-V cores in their products. The issue though is that nobody HAS to tell us they used RISC-V (that's part of the beauty of it). For small micro-controller type cores, the decision is made by some engineer to go with RISC-V instead of rolling his own ISA ($ and time are too tight to go external for a simple micro-controller), but that doesn't mean he has the power to publicly announce to the world what tools and IP his company uses in its products. Anyways, we're trying to get more people to open up so we can help make a stronger case for RISC-V by using more success stories from industry.