3 ms·
Noteworthy limitation [1]: > The only gotcha is that the FPGA onchip memory is OTP, so it should either be loaded by external CPU over SPI, or from external SP
by HappyTypist 11y ago
Noteworthy limitation [1]:
> The only gotcha is that the FPGA onchip memory is OTP, so it should either be loaded by external CPU over SPI, or from external SPI Flash, in both cases the SPI pins are user defined IO after bootstrap. Or then fixed configuration is burned into OTP.
Basically, while it -may- retail for $5 you will need an external CPU or flash for it to work. This sounds like a heavily restrictive limitation. I'd rather pay for a $8 FPGA module with actual persistent memory.
[2] https://hackaday.io/project/6592-dipsy https://hackaday.io/project/6592-dipsy
- raverbashing 11y agoI think you would be surprised to know a lot of the bigger FPGAs work exactly like that You usually need a serial flash with the data, or load it on device boot (no persistent memory)
- tcas 11y agoI think almost every FPGA is like that -- I think ones that have internal flash (like the Spartan-3AN) are still SRAM based and just have a flash chip in the package as well. The only flash based programmable logic from Xilinx/Altera are CPLDs as far as I remember. External SPI flash is pretty cheap even at low quantity (~$0.50 at qty 1 for 2Mbit, going down to the $0.30 range for low thousands)
- makomk 11y agoYeah, but FPGA dev boards usually have the required Flash chip integrated on the board rather than requiring you to supply your own.
- raverbashing 11y agoOf course. Because it's a dev board
- david-given 11y agoHow big is the bitstream for a device like this?
- taralx 11y agoTrue flash FPGAs do exist -- they're used when startup time is important. Microsemi has quite a few.