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As a former hardware engineer who worked on automated test equipment that tested ASICs (and did ASIC dev), there are a lot of different methods used to avoid th
by gibrown 11y ago
As a former hardware engineer who worked on automated test equipment that tested ASICs (and did ASIC dev), there are a lot of different methods used to avoid this.
As others mentioned, most of these problems are caught when testing the chips. Most of the transistors on a chip are actually used for caching or RAM, and in those cases the chips have built in methods for disabling the portions of memory that are non-functional. I don't recall any instances of CPUs/firmware doing this dynamically, but I wouldn't be surprised if there are. A lot of chips have some self diagnostics.
Most ASICs also have extra transistors sprinkled around so they can bypass and fix errors in the manufacturing process. Making chips is like printing money where some percentage of your money is defective. It pays to try and fix them after printing.
Also, as someone who has ordered lots of parts there are many cases where you put a part into production and then find an abnormally high failure rate. I once did a few months of high temperature and vibration testing on our boards to try and discover these sorts of issues, and then you spend a bunch of time convincing the manufacturer that their parts are not meeting spec.
Fun times... thanks for the trip down memory lane.
- mcshicks 11y agoIn my previous job I did failure analysis for returned ASICs for a high volume commercial application. As the parent says in fact because a modern ASIC has structural coverage with built in self test for the overwhelming majority of digital circuits, you don't ship a lot of parts with bad transistors. The vast majority of ASICs that I saw that were returned had failed due to electrical over stress, which is polite way of saying the customer blew up the part. But even more to the point, in modern electronics the ratio of problems caused by either software or assembly level issues is very high compared to ASIC level hw problems. High volume ASICs are designed with relatively large margins to ensure good product yield. Further the cost of investigating and root causing an issue to the transistor level is very high, that unless you have measurable trend defect rate, any actual random failure not related to design would probably be attributed to something else first. That is not to say that there are no HW design level issues with ASICs, but generally when they are discovered you would try and change the low level software to either make the problem not happen ever, or make it very very infrequent. You might also simply screen (test) the parts so you don't ship any that exhibit the undesired behavior. So it's not that such an event that the OP mentions can never happen, it's just that it's so infrequent compared to all the other types of problems that can happen in modern electronics that unless you have a very specific reason to believe it's being caused by hardware you would never be able to differentiate it from a random software bug.
- Taniwha 11y agowell not quite - people certainly add spare gates - but not for fixing individual errors - instead you add maybe 1% extra gates - if you find a bug in your design you can redo the upper metal layers using the extra gates to fix it - that changes ALL the chips you make, not just fix one bad transistor in aparticular chip
- gibrown 11y agoYou're right, that was inelegantly written and kinda conflates two different things. Gates are spread around for fixing design errors as you describe. There is also often redundant logic and memory built in to allow fixing individual chips though. Here's a quick presentation I found on laser repairs: http://www.ee.ncu.edu.tw/~jfli/memtest/lecture/ch07.pdf http://www.ee.ncu.edu.tw/~jfli/memtest/lecture/ch07.pdf