Yes it's very susceptible to interference though coupling of the charge on on the floating gate of the cell and through voltage differentials on the interconnec

Yes it's very susceptible to interference though coupling of the charge on on the floating gate of the cell and through voltage differentials on the interconnect lines during reading and writing. But 2D NAND storage essentially hit the peak density. The gate is only a few atoms across. The only way to increase density to build up. They had to go back to larger transistor sizes because of all the interference. IIRC from 15-16nm to about 60nm.