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I like VHDL. Verilog and non-blocking vs blocking assignments can trip you up so easily. As for verbose code, you spend way more time debugging and thinking abo
by krapht 11y ago
I like VHDL. Verilog and non-blocking vs blocking assignments can trip you up so easily. As for verbose code, you spend way more time debugging and thinking about how to structure a program than you do writing text on the screen.
- blackguardx 11y agoI prefer Verilog but what you say is true or at least should be true if you want to end up with a good, easily debuggable result.