There is nothing stopping someone from implementing a Harvard architecture CPU which has the ability to move data to/from program memory. I've never heard of so

There is nothing stopping someone from implementing a Harvard architecture CPU which has the ability to move data to/from program memory. I've never heard of something like that though. So that would be "open". In Microchip PIC land, that would be especially inconvenient, because of the different data vs. instruction size.