4 ms·
> (notice: a, b, c, d) Either I am wrong or is the actual order a, c, b, d in x86 (I remember at least the 32bit GPRs being coded in the order EAX, ECX, EBX, E
by CrystalGamma 11y ago
> (notice: a, b, c, d)
Either I am wrong or is the actual order a, c, b, d in x86 (I remember at least the 32bit GPRs being coded in the order EAX, ECX, EBX, EDX)? :D
- hfern 11y agoYes you're right. Originally there was no B register in generations prior to x86.
- masklinn 11y agoAccording to wikipedia, the 8080 already had a B register (its registers were A, B, C, D, E, H and L, the (BC), (DE) and (HL) pairs could be used as 16 bits registers)
- barrkel 11y agoThe order is AX CX DX BX SP BP SI DI
- caipre 11y agoWhat does "order" mean here? Is a register different from any other, except by conventional use?
- barrkel 11y agoThe bits used to represent each register in 8086 machine code, when sorted as binary numbers, come out in this order. Where the bits go depend on the instruction and addressing mode. They generally follow this pattern; some addressing modes don't support some registers though.
- userbinator 11y agoThe reason I've heard for this ordering (or why BX is out of alphabetic order) is that in 16-bit x86, it's the only "splittable" (into BH and BL) register that can be used to access memory, so it was grouped together with the last 4 (which can also be used to access memory) in order to simplify the logic.
- barrkel 11y agoAll the first four registers are splittable and can be used in all addressing modes[1], apart from CISCy instructions like loop and jcx that implicitly use CX (count) register, string operations, xlat, imul etc. My personal suspicion is that it's something to do with bit ordering. If you reverse the order of bits from LSB to MSB, then BX and CX switch places. [1] Indexed addressing modes do need to use BX or BP as a base on 8086. Indexed modes are a bit CISCy though, considering they are often used with lea to do non-memory calculations.