Wow, that is pretty awesome. I didn't expect this to have arrived that quickly. Does it support user constraints on relative placement (and routing)? Self-ti

Wow, that is pretty awesome. I didn't expect this to have arrived that quickly. Does it support user constraints on relative placement (and routing)? Self-timed logic, such as NULL Convention Logic [1], doesn't fit well with the synchronous FPGA paradigm, but can be implement on those if the feedback loops are tightly controlled [2]. I'd like to play with that :) [1] http://en.wikipedia.org/wiki/Asynchronous_circuit http://en.wikipedia.org/wiki/Asynchronous_circuit http://www.amazon.com/Designing-Asynchronous-Circuits-Convention-Synthesis/dp/1598299816 [2] http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=5438673&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D5438673 http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=543867...